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參數資料
| 型號： | MM74HC133J |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 13-Input NAND Gate |
| 中文描述： | HC/UH SERIES, 13-INPUT NAND GATE, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數： | 1/4頁 |
| 文件大?。?/td> | 149K |
| 代理商： | MM74HC133J |
TL/F/5134
M
January 1988
MM54HC133/MM74HC133 13-Input NAND Gate
General Description
This NAND gate utilizes advanced silicon-gate CMOS tech-
nology to achieve operating speeds similar to LS-TTL gates
with the low power consumption of standard CMOS inte-
grated circuits. All gates have buffered outputs. All devices
have high noise immunity and the ability to drive 10 LS-TTL
loads. The 54HC/74HC logic family is functionally as well as
pin-out compatible with the standard 54LS/74LS logic fami-
ly. All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
CC
and ground.
Features
Y
Typical propagation delay: 20 ns
Y
Wide power supply range: 2–6V
Y
Low quiescent current: 20
m
A maximum (74HC Series)
Y
Low input current: 1
m
A maximum
Y
Fanout of 10 LS-TTL loads
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/5134–1
Top View
Order Number MM54HC133 or MM74HC133
TL/F/5134–2
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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相關代理商/技術參數 |
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| MM74HC133MX | 制造商:Texas Instruments 功能描述: |
| MM74HC133N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:13-Input NAND Gate |
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| MM74HC137N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:3-to-8 Line Decoder With Address Latches (Inverted Output) |
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