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參數(shù)資料
型號: MN101CF84D
廠商: PANASONIC CORP
元件分類: 微控制器/微處理器
英文描述: MN101C84A
中文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-64
文件頁數(shù): 1/4頁
文件大小: 304K
代理商: MN101CF84D
MAD00049DEM
MN101C84A
Type
Internal ROM type
ROM (byte)
RAM (byte)
Package (Lead-free)
MN
101
C
84
A
Mask ROM
32
K
1
K
MN
101
CF
84
D
FLASH
64
K
2
K
LQFP
064
-P-
1414
0
.
1
μ s (at
4
.
5
V to
5
.
5
V,
20
MHz)
0
.
25
μ s (at
2
.
7
V to
5
.
5
V,
8
MHz)
62
.
5
μ s (at
2
.
0
V to
5
.
5
V,
32
kHz) *
Minimum Instruction
Execution Time
* The lower limit for operation guarantee for flash memory built-in type is
2
.
5
V.
Interrupts
RESET, Watchdog, External
0
to
2
, External
4
(key interrupt dedicated), Timer
0
to
3
, Timer
6
, Timer
7
(
2
systems), Timer
8
(
2
systems), Time base, Serial
0
(
2
systems), A/D conversion finish
Timer Counter
Timer counter
0
:
8
-bit
×
1
(square-wave/
8
-bit PWM output, event count, generation of remote control carrier, simple pulse width measurement)
(square-wave/PWM output to large current terminal P
50
possible)
Clock source ...............
1
/
2
,
1
/
4
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
32
,
1
/
64
,
1
/
128
,
1
/
256
,
1
/
512
of OSC oscillation
clock frequency;
1
/
1
of XI oscillation clock frequency; external clock input
nterrupt source ........... coincidence with compare register
0
Timer counter
1
:
8
-bit
×
1
(square-wave output, event count, synchronous output event)
Clock source ...............
1
/
2
,
1
/
8
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
2
1
3
1
/
2
1
5
1
/
32
,
1
/
64
,
1
/
128
,
1
/
256
of OSC oscillation
clock frequency;
1
/
1
of XI oscillation clock frequency; external clock input
nterrupt source ........... coincidence with compare register
1
Timer counter
0
,
1
can be cascade-connected.
Timer counter
2
:
8
-bit
×
1
(square-wave output, additional pulse type
10
-bit PWM output, event count, synchronous output event, simple pulse
width measurement)
(square-wave/PWM output to large current terminal P
52
possible)
Clock source ...............
1
/
2
,
1
/
4
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
32
,
1
/
64
,
1
/
128
,
1
/
256
,
1
/
512
of OSC oscillation
clock frequency;
1
/
1
of XI oscillation clock frequency; external clock input
nterrupt source ........... coincidence with compare register
2
Timer counter
3
:
8
-bit
×
1
(square-wave output, event count, generation of remote control carrier, serial
0
baud rate timer)
Clock source ...............
1
/
2
,
1
/
8
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
64
,
1
/
128
,
1
/
256
,
1
/
512
of OSC oscillation clock
frequency;
1
/
1
of XI oscillation clock frequency; external clock input
nterrupt source ........... coincidence with compare register
3
Timer counter
2
,
3
can be cascade-connected.
Timer counter
6
:
8
-bit freerun timer
Clock source ...............
1
/
1
of system clock frequency;
1
/
1
,
1
/
2
1
2
1
/
2
1
3
of OSC oscillation clock frequency;
1
/
1
,
1
/
2
1
2
1
/
2
1
3
of XI
oscillation clock frequency
nterrupt source ........... coincidence with compare register
6
Timer counter
7
:
16
-bit
×
1
(square-wave output, IGBT/
16
-bit PWM output (cycle / duty continuous variable), event count, synchronous output
evevt, pulse width measurement, input capture)
(square-wave/PWM output to large current terminal P
51
possible)
Clock source ...............
1
/
1
,
1
/
2
,
1
/
4
,
1
/
16
of system clock frequency;
1
/
1
,
1
/
2
,
1
/
4
,
1
/
16
of OSC oscillation clock frequency;
1
/
1
,
1
/
2
,
1
/
4
,
1
/
16
of external clock input frequency
nterrupt source ........... coincidence with compare register
7
(
2
lines)
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