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參數(shù)資料
| 型號(hào)： | MN102L610B |
| 廠商： | PANASONIC CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RESET Watchdog Timer counter 0 to 5 Timer counter 6 to 7 |
| 中文描述： | 16-BIT, MROM, 22.6 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 1/3頁(yè) |
| 文件大小： | 367K |
| 代理商： | MN102L610B |
1
MN102L610B
RAM (
×
8-bit /
×
16-bit)
Package
4 K
ROM (
×
8-bit /
×
16-bit)
External
Type
MN102L610B
LQFP100-P-1414
*Lead-free
Minimum Instruction
Execution Time
88.5 ns (at 4.5 V to 5.5 V, 22.6 MHz)
Interrupts
RESET Watchdog Timer counter 0 to 5 Timer counter 6 to 7
Timer counter 6 to 7 compare capture A Timer counter 6 to 7 compare capture B
ATC transfer finish External 0 to 4 Serial ch.0, 1 transmission Serial ch.0, 1 reception
NMI pin A/D conversion finish
Timer counter 0 : 8-bit
×
1 (timer output, event count)
Clock source ····················· 1/1, 1/128 of system clock frequency; 1/4 of low speed clock frequency;
external clock
Interrupt source ················ underflow of timer counter 0
Timer Counter
Timer counter 1 : 8-bit
×
1 (timer output, event count, A/D conversion start up)
Clock source ····················· system clock; 1/4 of low speed clock frequency; external clock;
timer counter 0 output
Interrupt source ················ underflow of timer counter 1
Timer counter 2 to 3 : 8-bit
×
1 (timer output, event count, UART baud rate generator)
Clock source ····················· system clock; external clock; timer counter 0 output;
timer counter 1, 2 output
Interrupt source ················ underflow of timer counter 2, 3
Timer counter 4, 5 : 8-bit
×
1 (timer output, event count)
Clock source ····················· 1/4 of low speed clock frequency; external clock; timer counter 0 output;
timer counter 3, 4 output
Interrupt source ················ underflow of timer counter 4, 5
Timer counter 6, 7 : 16-bit
×
1
(timer output, event count, input capture, output compare, PWM output, 2-phase encoder input)
Clock source ····················· system clock; external clock; timer counter 4, 5 output
Interrupt source ················ coincidence with compare capture A or at capture; coincidence with compare
capture B or at capture; underflow of timer counter 6, 7
Connectable
timer counter 0 to 5
Serial Interface
Serial 0 : 7, 8-bit
×
1 (common use with UART, transfer direction of MSB/LSB selectable)
Clock source ····················· 1/16 of timer counter 2 frequency; 1/16 of timer counter 3 frequency;
external clock; 1/2 of timer counter 2 frequency
Serial 1 : 7, 8-bit
×
1 (common use with UART, transfer direction of MSB/LSB selectable)
Clock source ····················· 1/16 of timer counter 2 frequency; 1/16 of timer counter 3 frequency;
external clock; 1/2 of timer counter 3 frequency
UART
×
2 (common use with serial 0, 1)
I
2
C
×
2 (single master)
I/O Pins
80
48
Common use : 16 (by 8 bits), 8 (by 4 bits), 56 (by bit)(MN102LF61G)
Common use : 8 (by 4 bits), 40 (by bit)(MN102L610B)
I/O
A/D Inputs
8-bit
×
8-ch. (with S/H)
PWM
16-bit
×
2-ch.
Notes
Burst ROM inferface support, ATC (between serial 0ch and internal RAM) support
Special Ports
LED drive port
×
2
MAE00004CEM
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