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參數資料
| 型號： | MPSA55RLRM |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 小信號晶體管 |
| 英文描述： | 500 mA, 60 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92 |
| 封裝： | PLASTIC, TO-226AA, 3 PIN |
| 文件頁數： | 24/36頁 |
| 文件大小： | 385K |
| 代理商： | MPSA55RLRM |
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Reliability and Quality Assurance
9–16
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MECHANICAL SHOCK
This test is used to determine the ability of the device to
withstand a sudden change in mechanical stress due to abrupt
changes in motion as seen in handling, transportation, or
actual use.
Typical Test Conditions: Acceleration = 1500 g’s, Orienta-
tion = X1, Y1, Y2 plane, t = 0.5 msec, Blows = 5
Common Failure Modes: Open, short, excessive leak-
age, mechanical failure
Common Failure Mechanisms: Die and wire bonds,
cracked die, package defects
Military Reference: MIL–STD–750, Method 2015
MOISTURE RESISTANCE
The purpose of this test is to evaluate the moisture resistance
of components under temperature/humidity conditions typical
of tropical environments.
Typical Test Conditions: TA = –10°C to 65°C, rh = 80%
to 98%, t = 24 hours/cycles, cycle = 10
Common Failure Modes: Parametric shifts in leakage
and mechanical failure
Common Failure Mechanisms: Corrosion or contami-
nants on or within the package materials. Poor package
sealing
Military Reference: MIL–STD–750, Method 1021
SOLDERABILITY
The purpose of this test is to measure the ability of the device
leads/terminals to be soldered after an extended period of
storage (shelf life).
Typical Test Conditions: Steam aging = 8 hours, Flux =
R, Solder = Sn60, Sn63
Common Failure Modes: Pin holes, dewetting, nonwet-
ting
Common Failure Mechanisms: Poor plating, contami-
nated leads
Military Reference: MIL–STD–750, Method 2026
SOLDER HEAT
This test is used to measure the ability of a device to withstand
the temperatures as may be seen in wave soldering
operations. Electrical testing is the endpoint critierion for this
stress.
Typical Test Conditions: Solder Temperature = 260
°C, t
= 10 seconds
Common Failure Modes: Parameter shifts, mechanical
failure
Common Failure Mechanisms: Poor package design
Military Reference: MIL–STD–750, Method 2031
STEADY STATE OPERATING LIFE (SSOL)
The purpose of this test is to evaluate the bulk stability of the
die and to generate defects resulting from manufacturing
aberrations
that
are
manifested
as
time
and
stress–dependent failures.
Typical Test Conditions: TA = 25°C, PD = Data Book
maximum rating, t = 16 to 1000 hours
Common Failure Modes: Parametric shifts and cata-
strophic
Common Failure Mechanisms: Foreign material, crack
die, bulk die, metallization, wire and die bond defects
Military Reference: MIL–STD–750, Method 1026
TEMPERATURE CYCLING (AIR TO AIR)
The purpose of this test is to evaluate the ability of the device
to withstand both exposure to extreme temperatures and
transitions between temperature extremes. This testing will
also expose excessive thermal mismatch between materials.
Typical Test Conditions: TA = –65°C to 200°C, cycle =
10 to 4000
Common Failure Modes: Parametric shifts and cata-
strophic
Common Failure Mechanisms: Wire bond, cracked or
lifted die and package failure
Military Reference: MIL–STD–750, Method 1051
THERMAL SHOCK (LIQUID TO LIQUID)
The purpose of this test is to evaluate the ability of the device
to withstand both exposure to extreme temperatures and
sudden transitions between temperature extremes. This
testing will also expose excessive thermal mismatch between
materials.
Typical Test Conditions: TA = 0°C to 100°C, cycle = 20
to 300
Common Failure Modes: Parametric shifts and cata-
strophic
Common Failure Mechanisms: Wire bond, cracked or
lifted die and package failure
Military Reference: MIL–STD–750, Method 1056
VARIABLE FREQUENCY VIBRATION
This test is used to examine the ability of the device to
withstand deterioration due to mechanical resonance.
Typical Test Conditions: Peak acceleration = 20 g’s,
Frequency range = 20 Hz to KHz, t = 48 minutes
Common Failure Modes: Open, short, excessive leak-
age, mechanical failure
Common Failure Mechanisms: Die and wire bonds,
cracked die, package defects
Military Reference: MIL–STD–750, Method 2056
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MPSA55T3 | 制造商:National Semiconductor Corporation 功能描述:TRANSISTOR, BJT, PNP, 60V V(BR) CEO, 500MA I(C), TO-92, FORMED LEADS |
| MPSA55-T92-B | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:NPN MPSA05 PNP MPSA55 |
| MPSA55-T92-K | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:NPN MPSA05 PNP MPSA55 |
| MPSA56 | 功能描述:兩極晶體管 - BJT PNP Med Power RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發射極最大電壓 VCEO:- 40 V 發射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
| MPS-A56 | 制造商:MICRO-ELECTRONICS 制造商全稱:Micro Electronics 功能描述:COMPLEMENTARY SILICON AF MEDIUM POWER TRANSISTORS |
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