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參數資料
| 型號： | MRFIC0914 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 衰減器 |
| 英文描述： | 900 MHz PAGING POWER AMPLIFIER Si MONOLITHIC INTEGRATED CIRCUIT |
| 中文描述： | 890 MHz - 928 MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER |
| 文件頁數： | 1/6頁 |
| 文件大小： | 127K |
| 代理商： | MRFIC0914 |
1
MRFIC0914
MOTOROLA RF DEVICE DATA
Motorola, Inc. 1997
The MRFIC Line
!
This integrated circuit is intended for two–way paging applications and for
other Industrial, Scientific and Medical (ISM) at 900 MHz band applications.
The three stage design is implemented in Motorola’s low cost, high perfor-
mance LDMOS process and housed in a low–cost surface mount SOIC
package. Input and output matching is implemented off–chip for maximum
flexibility while interstage matching is on–chip. A power control pin is included
allowing 60 dB dynamic range.
30.5 dBm Output Power for 3 dBm Input Power at 900 MHz
32 dB Typ Small Signal Gain
40% Efficiency Min at 30.5 dBm Output Power
4.0 to 5.5 Volt Operation
Low–Cost, Low Profile Plastic SOIC Package
Order MRFIC0914R2 for Tape and Reel.
R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel.
Device Marking = M0914
ABSOLUTE MAXIMUM RATINGS
(TA = 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Supply Voltage
VD1, VD2, VD3
IDtotal
VCNTRL
Pin
TA
Tstg
θ
JC
9
Vdc
Supply Current
2
Adc
Power Control Voltage
4.8
Vdc
Input Power
6
dBm
Ambient Operating Temperature
–30 to +80
°
C
Storage Temperature
–65 to +150
°
C
Thermal Resistance, Junction to Case
26
°
C/W
Pin Connections and Functional Block Diagram
1
2
3
4
5
6
7
8
11
12
9
14
15
16
13
10
VCNTRL
GND
GND
GND
GND
RF OUT/VD3
GND
RF IN
GND
GND
GND
VD1
CONTROL
VD2
GND
GND
GND
Order this document
by MRFIC0914/D
SEMICONDUCTOR TECHNICAL DATA
900 MHz PAGING
POWER AMPLIFIER
Si MONOLITHIC
INTEGRATED CIRCUIT
CASE 751B–05
(SOIC–16)
REV 2
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