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MT88E45
4-Wire Calling Number Identification Circuit 2
Advance Information
(4-Wire CNIC2)
Features
Compatible with:
Bellcore GR-30-CORE, SR-TSV-002476,
ANSI/TIA/EIA-716, draft TIA/EIA-777;
ETSI ETS 300 778-1 (FSK only variant) & -2;
BT (British Telecom) SIN227 & SIN242
Bellcore ‘CPE Alerting Signal’ (CAS), ETSI
‘Dual Tone Alerting Signal’ (DT-AS), BT Idle
State and Loop State ‘Tone Alert Signal’
detection
1200 baud Bell 202 and CCITT V.23 FSK
demodulation
Separate differential input amplifiers with
adjustable gain for Tip/Ring and telephone
hybrid or speech IC connections
Selectable 3-wire FSK data interface (bit
stream or 1 byte buffer)
Facility to monitor the stop bit for framing error
check
FSK Carrier detect status output
3 to 5V +/- 10% supply voltage
Uses 3.579545MHz crystal or ceramic
resonator
Low power CMOS with power down
Applications
Bellcore CID (Calling Identity Delivery) and
CIDCW (Calling Identity Delivery on Call
Waiting) telephones and adjuncts
ETSI, BT CLIP (Calling Line Identity
Presentation) and CLIP with Call Waiting
telephones and adjuncts
Fax and answering machines
Computer Telephony Integration (CTI) systems
Description
The MT88E45 is a low power CMOS integrated
circuit suitable for receiving the physical layer signals
used in North American (Bellcore) Calling Identity
Delivery on Call Waiting (CIDCW) and Calling
Identity Delivery (CID) services. It is also suitable for
ETSI and BT Calling Line Identity Presentation
(CLIP) and CLIP with Call Waiting services.
The MT88E45 contains a 1200 baud Bell 202/CCITT
V.23 FSK demodulator and a CAS/DT-AS detector.
Two input op-amps allow the MT88E45 to be
connected to both Tip/Ring and the telephone hybrid
or speech IC receive pair for optimal CIDCW
telephone
architectural
demodulation is always on Tip/Ring, while CAS
detection can be on Tip/Ring or Hybrid Receive. Tip/
Ring CAS detection is required for Bellcore’s
proposed Multiple Extension Interworking (MEI) and
BT’s on-hook CLIP. A selectable FSK data interface
allows the data to be processed as a bit stream or
extracted from a 1 byte on chip buffer. Power
management has been incorporated to power down
the FSK or CAS section when not required. Full chip
power down is also available. The MT88E45 is
suitable for applications using a fixed power source
(with a +/-10% variation) between 3 and 5V.
implementation.
FSK
Figure 1 - Functional Block Diagram
Anti-Alias
Filter
FSK
Bandpass
FSK
Demodulator
+
-
+
-
Data Timing
Recovery
Carrier
Detector
2130Hz
Bandpass
2750Hz
Bandpass
Tone
Detection
Algorithm
FSKen+Tip/Ring CASen
Hybrid CASen
Guard
Time
M
DR
STD
Bias
Generator
Oscillator
Control Bit
Decode
FSKen
CASen
PWDN
IN1+
IN1-
GS1
IN2+
IN2-
GS2
V
REF
OSC1
OSC2
CB0
CB2
CB1
DATA
DCLK
CD
DR/STD
ST/GT
EST
Vdd
Vss
MODE
MODE
FSKen
CASen
CASen
PWDN
PWDN
PWDN
PWDN
DS5143
ISSUE 2
March 1999
Ordering Information
MT88E45AS
-40
°
C to 85
°
C
20 Pin SOIC