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參數資料
| 型號： | MTC20136PQ-l1 |
| 廠商： | 意法半導體 |
| 英文描述： | ADSL TRANSCEIVER CONTROLLER |
| 中文描述： | 寬帶收發器控制器 |
| 文件頁數： | 4/25頁 |
| 文件大小： | 634K |
| 代理商： | MTC20136PQ-L1 |
MTC20136
4/25
The table below describes the pins, organized per interface. Some of these pins have a multiple function-
ality. In this case both functionalities are mentioned.
Name
I/O Type
Description
External Bus Interface
E_A[19:16]
E_A[15:0]
E_D[15:0]
E_CLK
E_ALE
E_nCS_0
E_nCS_1
E_nCS_S
E_nCS_4
E_nCS_5
E_nCS_6
E_nCS_7
E_nRDYRCV
E_nOE
E_nWE0
E_nWE1
Clock Bus Interface
CLK_IN
Parallel Port Interface
PA[0]
PA[1]
UART1 Interface
RSTXD1
RSRXD1
UART2 Interface
RSTXD2
RSRXD2
Interrupt Interface
EIT_0
EIT_1
EIT_2
EIT_3
JTAG Interface
nTRST
TCK
TDI
TMS
TDO
Reset Interface
RESETN
Boot Interface
TROM
O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
O
O
O
Address bus MSBs
Address bus LSBs / Testbus MSBs
Data bus / Testbus LSBs
EBI clock (ASIC Access)
Address latch enable (ASIC Access)
Chip select signal (Memory Bank 0)
Chip select signal (Memory Bank 1)
Chip select signal (SDRAM)
Chip select signal (ASIC 1)
Chip select signal (ASIC 2)
Chip select signal (ASIC 3)
Chip select signal (ASIC 4)
Data acknowledge
Output enable
Write enable LSB / W/notR indication
Write enable MSB
I
MTC20136 Master clock
I/O
I/O
Port A bit[0]
Port A bit[1]
O
I
Serial TX port
Serial RX port
O
I
Serial TX port
Serial RX port
I
I
I
I
External interrupt lines
External interrupt lines
External interrupt lines
External interrupt lines
I-PU
I-PU
I-PU
I-PU
O
Reset JTAG interface
JTAG clock
Test Data In
Test Mode Select
Test Data Out
I
Reset signal (Active High)
I
Boot from ROM select
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MTC-20144TQ-1 | 制造商:Alcatel-Lucent 功能描述:ELECTRONIC COMPONENT |
| MTC-20144TQ-C | 制造商:Contact Us 功能描述:MODEM-SUPPORT CIRCUIT, PQFP64 |
| MTC20144-TQ-C2 | 制造商:STMicroelectronics 功能描述:ADSL AFE - Tape and Reel |
| MTC-20144TQ-I | 制造商:Alcatel-Lucent 功能描述:ELECTRONIC COMPONENT |
| MTC20144-TQ-I1 | 制造商:STMicroelectronics 功能描述:ADSL AFE - Tape and Reel |
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