參數資料
| 型號： | NBSG16VSMNHTBG |
| 廠商： | ON Semiconductor |
| 文件頁數： | 1/14頁 |
| 文件大小： | 0K |
| 描述： | IC RCVR/DVR SIGE DIFF 16QFN |
| 標準包裝： | 100 |
| 類型： | 收發器 |
| 應用： | 儀表 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 16-QFN（3x3） |
| 包裝： | 帶卷 (TR) |
| 配用： | NBSG16VSBAEVBOS-ND - BOARD EVAL BBG NBSG16VSBA |
Semiconductor Components Industries, LLC, 2008
September, 2008 Rev. 12
1
Publication Order Number:
NBSG16VS/D
NBSG16VS
2.5V/3.3VSiGe Differential
Receiver/Driver with
Variable Output Swing
Description
The NBSG16VS is a differential receiver/driver targeted for high
frequency applications that require variable output swing. The device
is functionally equivalent to the EP16VS device with much higher
bandwidth and lower EMI capabilities. This device may be used for
applications driving VCSEL lasers.
Inputs incorporate internal 50
W termination resistors and accept
NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS,
CML, or LVDS. The output amplitude is varied by applying a voltage
to the VCTRL input pin. Outputs are variable swing ECL from 100 mV
to 750 mV amplitude, optimized for operation from
VCC VEE = 3.0 V to 3.465 V.
The VBB and VMM pins are internally generated voltage supplies
available to this device only. The VBB is used as a reference voltage
for singleended NECL or PECL inputs and the VMM pin is used as a
reference voltage for LVCMOS inputs. For singleended input
operation, the unused complementary differential input is connected to
VBB or VMM as a switching reference voltage. VBB or VMM may also
rebias ACcoupled inputs. When used, decouple VBB and VMM via a
0.01
mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, VBB and VMM outputs should be left open.
Features
Maximum Input Clock Frequency up to 12 GHz Typical
Maximum Input Data Rate up to 12 Gb/s Typical
40 ps Typical Rise and Fall Times (VCTRL = VCC 1 V)
120 ps Typical Propagation Delay (VCTRL = VCC 1 V)
Variable Swing PECL Output with Operating Range: VCC = 2.375 V to
3.465 V with VEE = 0 V
Variable Swing NECL Output with NECL Inputs with
Operating Range: VCC = 0 V with VEE = 2.375 V to 3.465 V
Output Level (100 mV to 750 mV PeaktoPeak Output;
VCC VEE = 3.0 V to 3.465 V), Differential Output Only
50 W Internal Input Termination Resistors
Compatible with Existing 2.5 V/3.3 V EP Devices
VBB and VMM Reference Voltage Output
PbFree Packages are Available
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= PbFree Package
FCBGA16
BA SUFFIX
CASE 489
MARKING DIAGRAMS*
QFN16
MN SUFFIX
CASE 485G
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
SGS
16
ALYWG
G
16
SG
16VS
ALYWG
G
1
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| NBSG16VSMNR2 | 功能描述:緩沖器和線路驅動器 2.5V/3.3V SiGe Diff RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| NBSG16VSMNR2G | 功能描述:緩沖器和線路驅動器 2.5V/3.3V SiGe Diff w/Variable Output RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| NBSG53A | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS |
| NBSG53A/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS |
| NBSG53A_06 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with Reset and OLS |
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