參數資料
| 型號： | NBSG86AMNR2 |
| 廠商： | ON Semiconductor |
| 文件頁數： | 6/17頁 |
| 文件大小： | 0K |
| 描述： | IC SMART GATE SIGE DIFF 16QFN |
| 產品變化通告： | LTB Notification 06/Feb/2008 |
| 標準包裝： | 3,000 |
| 邏輯類型： | 可配置多功能 |
| 電路數： | 2 |
| 輸入數： | 2 |
| 施密特觸發器輸入： | 無 |
| 輸出類型： | 差分 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 16-QFN（3x3） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | NBSG86AMNR2OSTR |
NBSG86A
http://onsemi.com
14
APPLICATION INFORMATION
All NBSG86A inputs can accept PECL, CML, LVTTL, LVCMOS and LVDS signal levels. The limitations for differential
input signal (LVDS, PECL, or CML) are minimum input swing of 75 mV and the maximum input swing of 2500 mV. Within
these conditions, the input voltage can range from VCC to 1.2 V. Examples interfaces are illustrated below in a 50 W
environment (Z = 50
W). For output termination and interface, refer to application note AND8020/D.
Table 14. INTERFACING OPTIONS
Interfacing Options
Connections
CML
LVDS
Connect VTD and VTD Together (See Figure 20)
ACCOUPLED
RSECL, PECL, NECL
Standard ECL Termination Techniques (See Figure 22)
LVTTL, LVCMOS
An External Voltage (VTHR) should be Applied to the Unused Complementary Differential Input. Nominal
VTHR is 1.5 V for LVTTL and VCC / 2 for LVCMOS Inputs. This Voltage must be within the
50 W
VCC
D
50 W
NBSG86A
VCC
VTD
VEE
VCC
Q
50 W 50 W
CML
Driver
VEE
Figure 18. CML Interface
Q
Z = 50 W
Figure 19. PECL Interface
50 W
VCC
PECL
Driver
D
50 W
NBSG86A
VEE
VBias*
VTD
VEE
RT
VEE
VCC
RT
5.0 V 290 W
3.3 V 150 W
2.5 V 80 W
Recommended RT Values
VTD
VCC
VTD
VBias*
Z = 50 W
C
*VBias must be within common mode range limits (VCMR)
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