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參數資料
| 型號： | NCP1082DEG |
| 廠商： | ON Semiconductor |
| 文件頁數： | 6/17頁 |
| 文件大小： | 214K |
| 描述： | IC CONV CTLR POE-PD 13W 20-TSSOP |
| 標準包裝： | 74 |
| 類型： | 以太網供電開關（PoE） |
| 應用： | 遠程外設（工業控制，相機，數據訪問） |
| 內部開關： | 是 |
| 電流限制： | 500mA |
| 電源電壓： | 0 V ~ 57 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬）裸露焊盤 |
| 供應商設備封裝： | 20-TSSOP-EP |
| 包裝： | 管件 |
NCP1082
http://onsemi.com
6
Table 2. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Conditions
Min
Max
Unit
VPORTP
Input power supply
Voltage with respect to VPORTN
1,2
0.3
72
V
RTN
ARTN
Analog ground supply 2
Passswitch in offstate
(Voltage with respect to VPORTN
1,2
)
0.3
72
V
VDDH
Internal regulator output
Voltage with respect to ARTN
0.3
17
V
VDDL
Internal regulator output
Voltage with respect to ARTN
0.3
3.6
V
CLASS
Analog output
Voltage with respect to VPORTN
1,2
0.3
3.6
V
INRUSH
Analog output
Voltage with respect to VPORTN
1,2
0.3
3.6
V
ILIM1
Analog output
Voltage with respect to VPORTN
1,2
0.3
3.6
V
UVLO
Analog input
Voltage with respect to VPORTN
1,2
0.3
3.6
V
OSC
Analog output
Voltage with respect to ARTN
0.3
3.6
V
COMP
Analog input / output
Voltage with respect to ARTN
0.3
3.6
V
FB
Analog input
Voltage with respect to ARTN
0.3
3.6
V
CS
Analog input
Voltage with respect to ARTN
0.3
3.6
V
SS
Analog input
Voltage with respect to ARTN
0.3
3.6
V
NC
Open pin
AUX
Analog input
Voltage with respect to VPORTN
1,2
0.3
3.6
V
TEST
Digital input
Voltage with respect to VPORTN
1,2
0.3
3.6
V
T
A
Ambient temperature
40
85
癈
T
J
Junction temperature
150
癈
T
J
TSD
Junction temperature (Note 1)
Thermal shutdown condition
175
癈
T
stg
Storage Temperature
55
150
癈
T
窲A
Thermal Resistance,
Junction to Air (Note 2)
Exposed pad connected to VPORTN
1,2
ground
37.6
癈/W
ESDHBM
Human Body Model
per JEDEC Standard JESD22
4
kV
ESDCDM
Charged Device Model
750
V
ESDMM
Machine Model
300
V
LU
Latchup
per JEDEC Standard JESD78
?00
mA
ESDSYS
System ESD (contact/air) (Note 3)
8/15
kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. T
J
TSD allowed during error conditions only. It is assumed that this maximum temperature condition does not occur more than 1 hour
cumulative during the useful life for reliability reasons.
2. Mounted on a 1S2P (3 layer) test board with copper coverage of 25 percent for the signal layers and 90 percent copper coverage for the
inner planes at an ambient temperature of 85癈 in still air. Refer to JEDEC JESD517 for details.
3. Surges per EN6100042, 1999 applied between RJ45 and output ground and between adapter input and output ground of the demo board.
The specified values are the test levels and not the failure levels.
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