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參數資料
| 型號： | NCP1337DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩壓器 |
| 英文描述： | PWM Current−Mode Controller for Free Running Quasi−Resonant Operation |
| 中文描述： | 0.5 A SWITCHING CONTROLLER, 130 kHz SWITCHING FREQ-MAX, PDSO7 |
| 封裝： | LEAD FREE, SOIC-7 |
| 文件頁數： | 11/14頁 |
| 文件大小： | 148K |
| 代理商： | NCP1337DR2G |
NCP1337
http://onsemi.com
11
Soxyless
The “Valley point detection” is based on the observation
of the Power MOSFET Drain voltage variations. When the
transformer is fully demagnetized, the Drain voltage
evolution from the plateau level down to the V
IN
asymptote
is governed by the resonating energy transfer between the
L
P
transformer inductor and the global capacitance present
on the Drain. These voltage oscillations create current
oscillation in the parasitic capacitor across the switching
MOSFET (modelized by the Crss capacitance between
Gate and Drain): a negative current (flowing out of DRV
pin) takes place during the decreasing part of the Drain
oscillation, and a positive current (entering into the DRV
pin) during the increasing part.
The Drain valley corresponds to the inversion of the
current (i.e., the zero crossing): by detecting this point, we
always ensure a true valley turnon.
Lprim
Crss
DRV
Isoxy
Vswitch
T
SWING
t
Figure 6. Soxyless Concept
The current in the Power MOSFET gate is:
Igate = Vringing/Zc (with Zc the capacitance impedance)
so
Igate = Vringing (2 Fres Crss)
The magnitude of this gate current depends on the
MOSFET, the resonating frequency and the voltage swing
present on the Drain at the end of the plateau voltage.
The dead time T
SWING
is given by the equation:
Tswing
0.5 Fres
* Lp * Cdrain
(eq. 1)
(where L
P
is the primary transformer inductance and
C
DRAIN
the total capacitance present on the MOSFET
Drain. This capacitance includes the snubber capacitor if
any, the transformer windings stray capacitance plus the
parasitic MOSFET capacitances C
OSS
and C
RSS
).
Internal Feedback Circuitry
To simplify the implementation of a primary regulation,
it is necessary to inject a current into the FB pin (instead of
sourcing it out). But to have a precise primary regulation,
the voltage present on FB pin must be regulated. Figure 8
gives the FB pin internal implementation: the circuitry
combines the functions of a current to voltage converter
and a voltage regulator.
FB
+
+
3 V
Vdd
Internal
Setpoint
20 kHz
Lowpass Filter
Figure 7. Internal Implementation of FB Pin
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相關代理商/技術參數 |
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|---|---|
| NCP1337PG | 功能描述:電流型 PWM 控制器 PWM CONTROLLER RoHS:否 制造商:Texas Instruments 開關頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數量:1 最大工作溫度:+ 105 C 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| NCP1338 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:PWM Current-Mode Controller for Free Running Quasi-Resonant Operation |
| NCP1338DR2G | 功能描述:電流型 PWM 控制器 PWM CNTRL SOIC 8 RoHS:否 制造商:Texas Instruments 開關頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數量:1 最大工作溫度:+ 105 C 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| NCP1338PG | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:PWM Current-Mode Controller for Free Running Quasi-Resonant Operation |
| NCP1351 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Power Factor Controllers |
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