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參數(shù)資料
| 型號： | NCP1417DMR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 200 mA DC-DC Step-up Converter with Dual Low Battery Protection |
| 中文描述： | 1 A SWITCHING REGULATOR, 600 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | MICRO-8 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 128K |
| 代理商： | NCP1417DMR2 |
NCP1417
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS
(V
OUT
= 3.3 V, T
A
= 25
°
C for typical value, –40
°
C
≤
T
A
≤
85 C for min/max values unless
otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
Operating Voltage
V
IN
1.0
–
5.5
V
Output Voltage Range (Adjusted by External Feedback)
V
OUT
V
IN
–
5.5
V
Reference Voltage (C
REF
= 150 nF, Under No Loading,
T
A
= 25 C)
V
REF_NL
1.183
1.190
1.197
V
Reference Voltage (C
REF
= 150 nF, Under No Loading,
–40 C
≤
T
A
≤
85 C)
V
REF_NL_A
1.178
–
1.202
V
Reference Voltage Temperature Coefficient
TC
VREF
–
0.03
–
mV/ C
Reference Voltage Load Current
(V
OUT
= 3.3 V, V
REF
= V
REF_NL
1.5%, C
REF
= 1.0 F) (Note 5
)
I
REF
2.5
–
–
mA
Reference Voltage Load Regulation
(V
OUT
= 3.3 V, I
LOAD
= 0 to 100 A, C
REF
= 1.0 F)
V
REF_LOAD
–
0.015
1.0
mV
Reference Voltage Line Regulation
V
REF_LINE
–
0.03
1.0
mV/V
FB, LBI Input Threshold
V
FB,
V
LBI
1.172
1.190
1.200
V
Internal NFET ON–Resistance (I
LX
= 100 mA)
R
DS(ON)_N
–
0.65
–
Internal PFET ON–Resistance (I
LX
= 100 mA)
R
DS(ON)_P
–
1.3
–
LX Switch Current Limit (NFET)
I
LIM
–
1.0
–
A
Operating Current into OUT
(V
FB
= 1.4 V, i.e. No Switching, V
OUT
= 3.3 V)
I
Q
–
9.0
14
A
Shutdown Current into OUT (SHDN = GND)
I
SD
–
0.05
1.0
A
LX Switch MAX. ON–Time (V
FB
= 1.0 V, V
OUT
= 3.3 V)
t
ON
0.8
1.4
2.0
S
LX Switch MIN. OFF–Time (V
FB
= 1.0 V, V
OUT
= 3.3 V)
t
OFF
0.22
0.25
0.46
S
FB Input Current
I
FB
–
1.5
20
nA
LBI/SHDN Input Current
I
LBI,
I
SHDN
–
1.5
8.0
nA
LBO1/LBO2 Low Output Voltage (V
LBI
= 0, I
SINK
= 1.0 mA)
V
LBO_L1
V
LBO_L2
–
–
–
–
0.08
0.08
V
LBI/SHDN Input Threshold for LBO1
V
LBI1
1.172
1.190
1.200
V
LBI/SHDN Input Threshold for LBO2
V
LBI2
0.904
0.944
0.965
V
LBI/SHDN Input Threshold, Low
V
SHDN_L
–
–
0.3
V
LBI/SHDN Input Threshold, High
V
SHDN_H
0.6
–
–
V
5. Loading capability decreases with V
OUT
.
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Pin Description
1
FB
Output Voltage Feedback Input.
2
LBI/SHDN
Low–Battery Detector Input and Shutdown Control input multi–function pin.
3
LBO1
Open–Drain Low–Battery Detector Output. Output is LOW when VLBI is < 1.172 V. LBO1 is high
impedance during shutdown.
4
REF
1.190 V Reference Voltage Output, bypassing with 150 nF capacitor if this pin is not loaded,
bypassing with 1
μ
F if this pin is loaded up to 2.5 mA @ V
OUT
= 3.3 V.
5
LBO2
Open–Drain Low–Battery Detector Output. Output is LOW when VLBI is < 0.904 V. LBO2 is high
impedance during shutdown.
6
GND
Ground
7
LX
N–Channel and P–Channel Power MOSFET Drain Connection.
8
OUT
Power Output. OUT provides bootstrap power to the IC.
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