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參數資料
| 型號： | NJ88C50NPAS |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | CAP 47PF 100V 10% X7R AXIAL TR-14 |
| 中文描述： | 雙低功耗頻率合成器 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 209K |
| 代理商： | NJ88C50NPAS |
NJ88C50
Dual Low Power Frequency Synthesiser
DS3805 - 1.8 July 1995
Fig.2 Simplified block diagram
The NJ88C50 is a low power integrated circuit, designed
as the heart of a fast locking PLL subsystem in a mobile radio
application. It is manufactured on Mitel Semiconductor 1.4
micron double polysilicon CMOS process, which ensures that
low power and low noise performance is achieved. The device
contains two synthesisers, one for the generation of VHF
signals up to 125MHz and a second for UHF (when used with
a mulitmodulus prescaler such as the SP8713/14/15). The
main synthesiser has the capability of driving a dual speed
loop filter and also can perform Fractional-N interpolation.
Both synthesisers use current source outputs from their
phase detectors to minimise external components. Various
sections may be powered down for battery economy.
NP20
Fig.1 Pin assignment
ABSOLUTE MAXIMUM RATINGS
Storage temperature
Operating temperature
Supply voltage
Voltage on any pin
-55°C to +150°C
-40°C to +85°C
-0.5 to 7.0V
-0.3V to (V
DD
+ 0.3V)
ORDERING INFORMATION
NJ88C50\IG\NPAS - (Industrial temp range in SSOP
package)
FEATURES
I
30MHz main synthesiser
I
125MHz auxiliary synthesiser
I
Programmable output current
from phase detector - up to 10mA
I
High input sensitivity
I
Fractional-N interpolator
I
Supports up to 4 modulus prescalers
I
SSOP package
APPLICATIONS
I
NMT, AMPS, ETACS cellular
I
GSM, IS-54, RCR-27 cellular
I
DCS1800 microcellular
I
DLMR, DSRR, TETRA
I
DECT, PHP cordless telephones
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