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參數(shù)資料
| 型號： | NL27WZU04DTT1G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 0K |
| 描述： | IC INVERTER DUAL UNBUFF 6-TSOP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | 27WZ |
| 邏輯類型： | 反相器 |
| 電路數(shù)： | 2 |
| 輸入數(shù)： | 1 |
| 電源電壓： | 1.65 V ~ 5.5 V |
| 電流 - 靜態(tài)（最大值）： | 1µA |
| 輸出電流高，低： | 16mA，16mA |
| 額定電壓和最大 CL 時(shí)的最大傳播延遲： | 5.6ns @ 5V，50pF |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 6-TSOP |
| 封裝/外殼： | SC-74，SOT-457 |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | NL27WZU04DTT1GOS |
Semiconductor Components Industries, LLC, 2012
June, 2012 Rev. 9
1
Publication Order Number:
NL27WZU04/D
NL27WZU04
Dual Unbuffered Inverter
The NL27WZU04 is a high performance dual unbuffered inverter
operating from a 1.65 to 5.5 V supply. These devices are well suited
for use as oscillators, pulse shapers, and in many other applications
requiring a highinput impedance amplifier. For digital applications,
the NL27WZ04 is recommended.
Features
Designed for 1.65 V to 5.5 V VCC Operation
Unbuffered for Crystal Oscillator and Analog Applications
LVCMOS Compatible
Source/Sink ±16 mA @ 4.5 V VCC
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
Chip Complexity: FET = 72; Equivalent Gate = 18
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
VCC
IN A1
OUT Y1
GND
IN A2
OUT Y2
1
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
IN A2
OUT Y2
1
OUT Y1
IN A1
1
2
34
5
6
PIN ASSIGNMENT
1
2
3IN A2
IN A1
GND
4
5VCC
OUT Y2
OUT Y1
6
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
SC88/SOT363/SC70
DF SUFFIX
CASE 419B
TSOP6
DT SUFFIX
CASE 318G
http://onsemi.com
1
6
M6 M G
G
1
M6
= Device Code
M
= Date Code*
G
= PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
6
M6 M G
G
M
Pin
Function
FUNCTION TABLE
L
A Input
Y Output
H
HL
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