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參數資料
型號: NLSF308MNR2G
廠商: ON Semiconductor
文件頁數: 1/5頁
文件大小: 0K
描述: IC GATE AND QUAD 2INPUT 16-QFN
標準包裝: 3,000
邏輯類型: 與門
電路數: 4
輸入數: 2
電源電壓: 2 V ~ 5.5 V
電流 - 靜態(最大值): 2µA
輸出電流高,低: 8mA,8mA
邏輯電平 - 低: 0.5V
邏輯電平 - 高: 1.5V
額定電壓和最大 CL 時的最大傳播延遲: 7.9ns @ 5V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應商設備封裝: 16-QFN(3x3)
封裝/外殼: 16-VFQFN 裸露焊盤
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2006
May, 2006 Rev. 4
1
Publication Order Number:
NLSF308/D
NLSF308
Quad 2Input AND Gate
The NLSF308 is an advanced high speed CMOS 2input AND gate
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
High Speed: tPD = 4.3 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 2.0 mA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Function Compatible with Other Standard Logic Families
QFN16 Package
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model; > 2000 V;
Machine Model; > 200 V
Chip Complexity: 24 FETs or 6 Equivalent Gates
PbFree Package is Available*
L
H
L
H
L
H
FUNCTION TABLE
Inputs
Output
AB
L
H
Y
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
NLSF308MNR2
QFN16
3000 / Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
NLSF308MNR2G
QFN16
(PbFree)
3000 / Tape & Reel
NLSF308 = Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= PbFree Package
(Note: Microdot may be in either location)
MARKING DIAGRAM
QFN16
MN SUFFIX
CASE 485G
16
NLSF
308
ALYW
G
1
1
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