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參數(shù)資料
型號: NUS5530MN
廠商: ON SEMICONDUCTOR
英文描述: Integrated Power MOSFET with PNP Low VCE(sat) Switching Transistor
中文描述: 集成功率MOSFET與進(jìn)步黨低Vce(sat)開關(guān)晶體管
文件頁數(shù): 1/9頁
文件大?。?/td> 167K
代理商: NUS5530MN
Semiconductor Components Industries, LLC, 2006
May, 2006
Rev. 0
1
Publication Order Number:
NUS5530MN/D
NUS5530MN
Integrated Power MOSFET
with PNP Low V
CE(sat)
Switching Transistor
This integrated device represents a new level of safety and
board
space reduction by combining the 20 V P
Channel FET with a
PNP Silicon Low V
CE(sat)
switching transistor. This newly integrated
product provides higher efficiency and accuracy for battery powered
portable electronics.
Features
Low R
DS(on)
(MOSFET) and Low V
CE(sat)
(Transistor)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive (MOSFET)
Performance DFN Package
This is a Pb
Free Device
Applications
Power Management in Portable and Battery
Powered Products; i.e.,
Cellular and Cordless Telephones and PCMCIA Cards
MAXIMUM RATINGS FOR P
CHANNEL FET
(T
A
= 25
°
C unless otherwise noted)
Rating
Symbol
5 sec
Steady
State
Unit
Drain
Source Voltage
V
DS
20
V
Gate
Source Voltage
V
GS
12
V
Continuous Drain Current
(T
J
= 150
°
C) (Note 1)
T
A
= 25
°
C
T
A
= 85
°
C
I
D
5.3
3.8
3.9
2.8
A
Pulsed Drain Current
I
DM
20
A
Continuous Source Current
(Note 1)
I
S
5.3
3.9
A
Maximum Power Dissipation
(Note 1)
T
A
= 25
°
C
T
A
= 85
°
C
P
D
2.5
1.3
1.3
0.7
W
Operating Junction and Storage
Temperature Range
T
J
, T
stg
55 to +150
°
C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size
(Cu area = 1.27 in sq [1 oz] including traces).
Device
Package
Shipping
ORDERING INFORMATION
http://onsemi.com
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
NUS5530MNR2G
DFN8
(Pb
Free)
3000/Tape & Reel
DFN8
CASE 506AL
N/C
Collector
Source
Drain
Emitter
Base
N/C
Gate
(Bottom View)
PIN ASSIGNMENT
A
Y
WW
= Assembly Location
= Year
= Work Week
= Pb
Free Package
1
2
3
4
8
7
6
5
1
8
Collector
Drain
(Top View)
1
2
3
4
8
7
6
5
1
MARKING DIAGRAM
5530
AYWW
(Note: Microdot may be in either location)
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