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參數資料
| 型號： | P0153 |
| 英文描述： | MCU CMOS 28 LD 4MHZ 8K OTP, -40C to +85C, 28-SPDIP, TUBE |
| 中文描述： | “表面環形電感器（屏蔽） -一個繞組：超薄- ”“山貓”“” |
| 文件頁數： | 1/1頁 |
| 文件大小： | 73K |
| 代理商： | P0153 |
21
PC500.B (5/02)
US 858 674 8100
UK 44 1483 401 700
France 33 3 84 35 04 04
Singapore 65 287 8998
Taiwan 886 2 2698 0228
Hong Kong 852 2788 6588
http://www.pulseeng.com
Reference Values
L @ DC
L
DC
(μH)
Control Values
L
W/O
DC
L
0
±20%
(μH)
Calculation Data
100 Gauss
ET
100
(V-μsec)
DCR (nom)
R
N
+15% MAX
(m
)
1 Amp DC
H
1
(Orsted)
Part
Number
I
DC
ET
(amp )
(V-μsec)
P0144
P0145
P0146
P0147
P0148
P0149
P0150
P0151
P0152
P0153
3.80
3.13
2.43
1.65
1.35
1.23
0.99
0.81
0.65
0.53
9.4
13.3
23
50
75
90
137
200
305
439
15.2
18.8
24.3
37.0
44.3
49.2
59.4
71.3
85.8
99.6
10.4
14.6
25
56
83
100
152
220
331
472
27
40
65
121
181
246
387
585
845
1322
2.65
3.13
4.10
6.15
7.47
8.19
10.12
12.17
14.94
17.83
11.95
14.12
18.46
27.69
33.67
36.93
45.61
54.85
67.34
80.37
SELF-LEADED SURFACE
MOUNT INDUCTORS
Materials meet UL 94-VO rating
Fits in half inch high boards for use in
laptop and notebook computers
Frequency range of up to 1 MHz
Patented, low profile, self-leaded design
Electrical Specifications @ 25°C — Operating Temperature -40°C to +130°C
Notes:
1. The reference inductance at rated DC current is a typical value.
2. Temperature rise is 50°C in typical buck or boost circuits at 250 KHz and with the
reference ET applied to the inductor.
3. Total loss in the inductor is 380 mWatts for 50°C temperature rise above ambient.
4. To estimate temperature rise in a given application, determine copper and core
losses, divide by 380 and multiply by 50.
5. For the copper loss, calculate I
DC
2
X R
N
.
Dimensions:
Inches
mm
Unless otherwise specified all tolerances are ±0,25
Mechanical
Schematic
.500 MAX
R
Suggested Pad Layout
2X .060
.400
10,16
4 SURFACES
.005/0,13
.215 MAX
.500 MAX
.390
9,91
.470
11,94
1
2
6. For core loss, using frequency (f) and operating flux density (B),
calculate 6.11 x 10
-18
x B
2.7
x f
2.04
.
7. For flux density (B), calculate ET (V-μsec) for the application, divide by
ET
100
from the table, and multiply by 100.
8. Limit the DC bias (H) to 46 orsteds. Calculate H by multiplying H
1
from
the table by I
DC
of the application.
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