參數資料
| 型號： | P1014NXN5HHA |
| 廠商： | Freescale Semiconductor |
| 文件頁數： | 1/2頁 |
| 文件大小： | 0K |
| 描述： | IC MPU 800MHZ 425TEPBGA1 |
| 產品培訓模塊： | Securing Intelligent Industrial and Network Devices |
| 產品變化通告： | ESDHC Host Detect Change 13/Feb/2012 |
| 標準包裝： | 1 |
| 系列： | QorIQ P1 |
| 處理器類型： | e500 |
| 速度： | 800MHz |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 425-FBGA |
| 供應商設備封裝： | 425-TEPBGA1 |
| 包裝： | 托盤 |
QorIQ Communications Platforms
QorIQ P1010 and P1014
Communications Processors
Target Markets and Applications
Wireless LAN access points
(802.11ac/802.11n)
SOHO/SMB routers
Controller for Ethernet switches
Network attached storage
Video surveillance
Factory automation and industrial control
Overview
The QorIQ P1010 and P1014 processors are
members of the value-perfomance tier, offering
extensive integration and extreme power
intelligence for a wide variety of applications
in cost-sensitive networking, network
attached storage, digital video surveillance
and industrial segments. Based on 45 nm
technology for low-power implementation,
the P1010 and P1014 processors provide a
single-core, low-power solution for the 533
to 1000 MHz performance range, along with
a trusted security platform and a rich set of
interfaces.
Secure Boot
The secure boot feature ensures that the
processors only run authenticated code.
Through a set of fuses that OEMs can
program once but can never be read, secure
boot prevents unauthorized parties from
reverse engineering code to steal intellectual
property, from loading illegitimate code to
change system functionality or from extracting
sensitive user information that may be stored
in the system.
Coherent System Bus
Security
4.4
Security Fuse
Processor
USB 2.0 w/PHY
Security Monitor
IFC, TDM
2x FlexCAN
SD/MMC
2x DUART
SPI, GPIO
2x I2C
6-Lane 2.5 GHz SerDes
DMA
Power Architecture
e500-v2 Core
32 KB
D Cache
32 KB
I Cache
256 KB
Frontside
Cache
SATA
1 GE
(P1010
only)
(P1010 only)
16/32-bit DDR3/3L
Memory Controller
(16-bit only for the P1014)
PCIe
Accelerators and Memory Control
Networking Elements
Core Complex (CPU and L2 Cache)
Basic Peripherals and Interconnect
QorIQ P1010 and P1014 Block Diagram
QorIQ P1010 and P1014 Processor Block Diagram
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