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參數資料
| 型號： | P1120-3SDE-FREQ-OUT21 |
| 廠商： | PLETRONICS INC |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 70 MHz - 170 MHz, CMOS OUTPUT |
| 文件頁數： | 1/1頁 |
| 文件大小： | 40K |
| 代理商： | P1120-3SDE-FREQ-OUT21 |
High Frequency Thru-Hole
Full Size or Half Size Metal Thru-Hole Clock Oscillator
CMOS with Enable/ Disable, 3rd Overtone Crystal Used
Low Jitter
70.00 MHz – 170.00 MHz
Standard Specifications
Overall Frequency Stability
± 50 PPM is standard, but ± 25 PPM and ± 20 PPM over Operating Temp. Range also available
Operating Temperature Range
0 to +70°C is standard, but can be extended to- 40 to +85°C for certain frequencies
Supply Voltage (Vcc)
5.0 volts and 3.3 volts available
Symmetry (Duty Cycle)
40/60 to 60/40% is standard, but 45/55% at 50% of Vcc is also available (see Waveform 1)
Output Load
Enable/Disable Option (E/D)
Output enabled when Pin #1 is open or at Logic “1”; Output disabled when Pin #1 is at Logic “0”.
Supply Current
Rise and Fall Time
Frequency Range
(MHz)
Typical
Maximum
Typical
Maximum
70.000 – 79.999
40.0
45.0
2.0
3.0
80.000 – 110.000
75.0
80.0
0.5
1.0
110.001 – 119.999
80.0
90.0
0.5
1.0
120.000 – 170.000
90.0
95.0
0.5
1.0
Part Numbering Guide
Model
Frequency Stability
45 = ± 50 PPM
44 = ± 25 PPM
Frequency in MHz
Special Specifications (choose all that apply)
P11 45 - 3SD V -- 70.0M - 30
Consult factory for available frequencies and specs. Not all options available for all frequencies. A special part number may be assigned.
Blank: Std Specs (5.0V ± 10%, 0 to +70 C, 40/60% Symmetry)
E: Extended Operating Temperature Range (- 40 to +85 C)
S: 45/55% Symmetry at 50% of Vcc
V: Supply Voltage of 3.3 volts ±10%
°
19013 36th Ave. West Suite H Lynnwood, WA 98036, USA
Consult factory for higher frequencies
Frequency Stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration and load
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
8
Jan 2002
Pl tronics, Inc.
Mechanical:
not to scale
inches (mm)
P1145-3SD
SQ3345D
P11xx-3SD (Full Size)
SQ33xxD (Half Size)
P11xx-3SD
SQ33xxD
Packaging
Tube or
on Pads
SQ33 45
D
V -- 70.0M - 30
Standard load is 15pF maximum, see Test Circuit 3 (consult factory for heavier loads)
Icc (mA) w/ 15pF load
Tr & Tf (nS) w/ 15pF load
Due to part size and factory abilities, part marking may vary from lot to lot and may contain our part number or an internal code.
Logic Levels
Logic “1” 90% of Vcc MIN; Logic “0” 10% of Vcc MAX
Non-Std Output Load
Blank = 15 pF max, 30 = 30 pF max, 50 = 50 pF max
1 pS RMS maximum, from 12 kHz to 20 MHz from carrier
Jitter
20 = ± 20 PPM
.807 (20.5) MAX
.500
(12.7)
MAX
.200 (5.08)
MAX
.600 (15.24)
.300
(7.62)
1
7
14
8
E/D
Vcc
OUT
GND
.031 (0.8)
.250 (6.35) MAX
.020
(.51)
.236 (6.0)
MAX
.020
(.51)
.250 (6.35) MAX
.492 (12.5) MAX
.300 (7.62)
.492
(12.5)
MAX
.300
(7.62)
1
4
8
5
E/D
Vcc
OUT
GND
.031 (0.8)
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| P1120-3SDESV | 制造商:PLETRONICS 制造商全稱:Pletronics, Inc. 功能描述:P113SD Series 3.3 V CMOS Clock Oscillators |
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