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參數資料
| 型號： | P4C1049L-70L36MB |
| 廠商： | PYRAMID SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | HIGH SPEED 512K x 8 STATIC CMOS RAM |
| 中文描述： | 512K X 8 STANDARD SRAM, 70 ns, CDSO36 |
| 封裝： | 0.452 X 0.920 INCH, CERAMIC, LCC-36 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 222K |
| 代理商： | P4C1049L-70L36MB |
1
Document #
SRAM128
REV OR
Revised October 2005
P4C1049/P4C1049L
HIGH SPEED 512K x 8
STATIC CMOS RAM
High Speed (Equal Access and Cycle Times)
— 15/20/25 ns (Commercial)
— 20/25/35 ns (Industrial)
— 20/25/35/45/55/70 ns (Military)
Low Power
Single 5V±10% Power Supply
Easy Memory Expansion Using
Inputs
Common Data I/O
Three-State Outputs
CE
and
OE
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
1519B
Fully TTL Compatible Inputs and Outputs
Advanced CMOS Technology
Automatic Power Down
Packages
—36-Pin SOJ (400 mil)
—36-Pin FLATPACK
—36-Pin LCC (452 mil x 920 mil)
FEATURES
DESCRIPTION
The P4C1049 is a 4 Megabit high-speed CMOS
static RAM organized as 512Kx8. The CMOS memory
requires no clocks or refreshing, and has equal access
and cycle times. Inputs are fully TTL-compatible. The
RAM operates from a single 5V±10% tolerance power
supply.
Access times as fast as 15 nanoseconds permit greatly
enhanced system operating speeds. CMOS is utilized
to reduce power consumption to a low level. The P4C1049
is a member of a family of PACE RAM products offer-
ing fast access times.
SOLDER-SEAL
FLATPACK (FS-4)
SOJ (J9)
The P4C1049 device provides asynchronous operation
with matching access and cycle times. Memory loca-
tions are specified on address pins A
to A
. Reading is
accomplished by device selection (
CE)
and output en-
abling (
OE
) while write enable (
WE
) remains HIGH. By
presenting the address under these conditions, the data
in the addressed memory location is presented on the
data input/output pins. The input/output pins stay in the
HIGH Z state when either
CE
or
OE
is HIGH or
WE
is
LOW.
LCC (L11)
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