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參數資料
| 型號： | P4C1256L-70PILF |
| 廠商： | PYRAMID SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 32K X 8 STANDARD SRAM, 70 ns, PDIP28 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-28 |
| 文件頁數： | 1/16頁 |
| 文件大小： | 1155K |
| 代理商： | P4C1256L-70PILF |
Document # SRAM119 REV I
Revised July 2010
P4C1256
HIGH SPEED 32K x 8
STATIC CMOS RAM
FEATURES
High Speed (Equal Access and Cycle Times)
– 12/15/20/25/35 ns (Commercial)
– 15/20/25/35/45 ns (Industrial)
– 20/25/35/45/55/70 ns (Military)
Low Power
Single 5V±10% Power Supply
Easy Memory Expansion Using CE and OE Inputs
Common Data I/O
Three-State Outputs
Fully TTL Compatible Inputs and Outputs
Advanced CMOS Technology
Fast t
OE
Automatic Power Down
Packages
– 28-Pin 300 mil DIP, SOJ, TSOP
– 28-Pin 300 mil Ceramic DIP
– 28-Pin 600 mil Plastic and Ceramic DIP
– 28-Pin CERPACK
– 28-Pin Solder Seal Flat Pack
– 28-Pin SOP
– 28-Pin LCC (350 mil x 550 mil)
– 32-Pin LCC (450 mil x 550 mil)
FUnCTIOnAL BLOCK DIAgRAM
PIn COnFIgURATIOnS
LCC and TSOP configurations at end of datasheet
DIP (P5, P6, C5, C5-1, D5-1, D5-2), SOJ (J5), SOP (S11-1, S11-3)
CERPACK (F4, FS-5) SIMILAR
DESCRIPTIOn
The P4C1256 is a 262,144-bit high-speed CMOS static
RAM organized as 32K x 8. The CMOS memory requires
no clocks or refreshing, and has equal access and cycle
times. Inputs are fullyTTL-compatible. The RAM operates
from a single 5V±10% tolerance power supply.
Access times as fast as 12 nanoseconds permit greatly
enhanced system operating speeds. CMOS is utilized to
reduce power consumption to a low level. The P4C1256
is a member of a family of PACE RAM products offering
fast access times.
The P4C1256 devices provides asynchronous operation
with matching access and cycle times. Memory locations
are specified on address pinsA
0 to A14. Reading is accom-
plished by device selection (CE) and output enabling (OE)
while write enable (WE) remains HIGH. By presenting the
address under these conditions, the data in the addressed
memorylocationispresentedonthedata input/outputpins.
The input/output pins stay in the HIGH Z state when either
CE or OE is HIGH or WE is LOW.
Package options for the P4C1256 include 28-pin DIP, SOJ,
and TSOP packages. For military temperature range,
Ceramic DIP and LCC packages are available.
相關PDF資料 |
PDF描述 |
|---|---|
| P4C1256-20PI | 32K X 8 STANDARD SRAM, 20 ns, PDIP28 |
| P4C1256-25JC | 32K X 8 STANDARD SRAM, 25 ns, PDSO28 |
| P4C1256L-45L32M | 32K X 8 STANDARD SRAM, 45 ns, QCC32 |
| P4C1256L-70CMB | 32K X 8 STANDARD SRAM, 70 ns, CDIP28 |
| P4C169-55LMB | 4K X 4 STANDARD SRAM, 55 ns, CQCC20 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| P4C1256L-70SC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1256L-70SI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1256L70SNCLF | 制造商:PYRAMID 制造商全稱:Pyramid Semiconductor Corporation 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1256L70SNILF | 制造商:PYRAMID 制造商全稱:Pyramid Semiconductor Corporation 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1257-20CC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x1 SRAM |
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