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參數(shù)資料
| 型號： | P82C150 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | CAN Serial Linked I/O device SLIO with digital and analog port functions |
| 中文描述： | CAN串行鏈接I / O與數(shù)字和模擬接口功能設(shè)備SLIO |
| 文件頁數(shù)： | 21/36頁 |
| 文件大小： | 209K |
| 代理商： | P82C150 |
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1996 Jun 19
21
Philips Semiconductors
Preliminary specification
CAN Serial Linked I/O device (SLIO) with
digital and analog port functions
P82C150
7.5
P82C150 operation after RESET or change of bus mode
Figure 9 illustrates the calibration procedure of the P82C150 after Power-on-reset or after a bus mode change.
andbook, full pagewidth
P82C150 receives calibration
message within 8192 bit times after
wake-up or bus mode change
P82C150 is fine calibrated
and I/O register cleared
bus mode change e.g. due to
missing reception of a calibration
message within 8192 bit times
end of
Power-on-reset
ID bits from P0-P3 latched
I/O registers cleared
P82C150 receives 1st message
(any message)
P82C150 receives 2nd message
(any message), acknowledge not
required but no active error flag allowed
P82C150 waits until bus-off recovery
sequence finished
P82C150 sends 'sign-on' message
P82C150 is roughly calibrated and has
started bus-off recovery sequence
(counting 129 blocks of 11 recessive bits)
Rough calibration verified
P82C150 is on bus and ready to
send after bus-of f sequence finished
Communication with host node possible
MHA080
Fig.9 SLIO operation flow after reset and bus mode change.
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