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參數資料
型號: P87C453EBLKA
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: CMOS single-chip 8-bit microcontrollers
中文描述: 8-BIT, UVPROM, 16 MHz, MICROCONTROLLER, CQCC68
文件頁數: 1/23頁
文件大小: 163K
代理商: P87C453EBLKA
Philips Semiconductors
Preliminary specification
80C453/83C453/87C453
CMOS single-chip 8-bit microcontrollers
3-311
1996 Aug 15
DESCRIPTION
The Philips 8XC453 is an I/O expanded single-chip microcontroller
fabricated with Philips high-density CMOS technology. Philips
epitaxial substrate minimizes latch-up sensitivity.
The 8XC453 is a functional extension of the 87C51 microcontroller
with three additional I/O ports and four I/O control lines. The 8XC453
is available in 68-pin LCC packages. Four control lines associated
with port 6 facilitate high-speed asynchronous I/O functions.
The 87C453 includes an 8k
×
8 EPROM, a 256
×
8 RAM, 56 I/O
lines, two 16-bit timer/counters, a seven source, two priority level,
nested interrupt structure, a serial I/O port for either a full duplex
UART, I/O expansion, or multi-processor communications, and
on-chip oscillator and clock circuits.
The 87C453 has two software selectable modes of reduced activity
for further power reduction; idle mode and power-down mode. Idle
mode freezes the CPU while allowing the RAM, timers, serial port,
and interrupt system to continue functioning. Power-down mode
freezes the oscillator, causing all other chip functions to be
inoperative while maintaining the RAM contents.
FEATURES
80C51 based architecture
Seven 8-bit I/O ports
Port 6 features:
Eight data pins
Four control pins
Direct MPU bus interface
ISA Bus Interface
Parallel printer interface
IBF and OBF interrupts
A flag latch on host write
On the microcontroller:
8k
×
8 EPROM
Quick pulse programming algorithm
Two-level program security system
256
×
8 RAM
Two 16-bit counter/timers
Two external interrupts
External memory addressing capability
64k ROM and 64k RAM
Low power consumption:
Normal operation: less than 24mA at 5V, 16MHz
Idle mode
Power-down mode
Reduced EMI
Full-duplex enhanced UART
Framing error detection
Automatic address recognition
LCC PIN FUNCTIONS
LCC
9
1
61
10
26
60
44
27
43
Pin
Function
EA/V
PP
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
V
CC
P4.7
P4.6
P4.5
P4.4
P4.3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Pin
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
Function
P4.2
P4.1
P4.0
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
P3.0/RxD
P3.1/TxD
P3.2/INTO
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
P5.0
P5.1
P5.2
Pin
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Function
P5.3
P5.4
P5.5
P5.6
P5.7
XTAL2
XTAL1
V
SS
ODS
IDS
BFLAG
AFLAG
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
PSEN
ALE/PROG
SU00157
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