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參數(shù)資料
型號: P87LPC768BN
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Low Power, Low System Cost 80C51 MCU with ADC and PWM
中文描述: 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PDIP20
封裝: 0.300 INCH, PLASTIC, MS-001, SOT146-1, DIP-20
文件頁數(shù): 2/2頁
文件大小: 94K
代理商: P87LPC768BN
P
Low Power, Low System Cost 80C51 MCU with ADC and PW M
P87LPC768
For more information, contact your Philips Semiconductors distributor or www.PhilipsMCU.com
N
orth America
Tel: 1 800 234-7381
Internet:
www.PhilipsMCU.com
Europe
Fax: +31 79 3685126
Asia
Fax: 886 2 2134-2941
Japan/Korea
Fax: +81-3-3740-5057
Internet (in Japanese):
www.philips.co.jp/semicon/
Philips Electronics N.V. 2000
All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document
does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for
any consequence of its use. Publication thereof does not convey nor imply any license under patent - or industrial or intellectual property rights.
Printed in the USA 611651/14K/FP/2pp/0500
9397-750-07045
LPC768 Block Diagram
Features
An accelerated 80C51 CPU provides instruction cycle
times of 300–600 ns for all instructions except multiply
and divide when executing at 20 MHz. Execution at up
to 20 MHz when V
DD
= 4.5 V to 6.0 V, 10 MHz when
V
DD
= 2.7 V to 6.0 V.
Four-channel Pulse Width Modulator.
Four-channel multiplexed 8-bit A/D converter.
Conversion time of 9.3 microseconds at f
osc
= 20 MHz.
2.7 V to 6.0 V operating range for digital functions.
4 K bytes OTP memory.
128 byte RAM data memory.
32-byte customer code EPROM allows serialization of
devices, storage of setup parameters, etc.
Two 16-bit counter/timers. Each timer may be
configured to toggle a port output upon timer overflow.
4K BYTE
CODE EPROM
INTERNAL
BUS
ACCELERATED
80C51 CPU
128 BYTE
DATA RAM
PORT 2
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
KEYPAD
INTERRUPT
UART
I2C
TIMER 0, 1
WATCHDOG TIMER
AND OSCILLATOR
ANALOG
COMPARATORS
A/D
CONVERTER
PULSE WIDTH
MODULATOR
CONFIGURABLE
OSCILLATOR
ON-CHIP R/C
OSCILLATOR
CRYSTAL OR
RESONATOR
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
Two analog comparators.
Full duplex UART.
I
2
C communication port.
Eight keypad interrupt inputs, plus two additional external
interrupt inputs.
Four interrupt priority levels.
Watchdog timer with separate on-chip oscillator, requiring
no external components. The watchdog timeout time is
selectable from 8 values.
Active low reset. On-chip power-on reset allows operation
with no external reset components.
Low voltage reset. One of two preset low voltage levels may
be selected to allow a graceful system shutdown when power
fails. May optionally be configured as an interrupt.
Oscillator Fail Detect. The watchdog timer has a separate
fully on-chip oscillator, allowing it to perform an oscillator
fail detect function.
Configurable on-chip oscillator with frequency range and
RC oscillator options (selected by user programmed
EPROM bits). The RC oscillator option allows operation
with no external oscillator components.
Programmable port output configuration options:
quasi-bidirectional, open drain, push-pull, input-only.
Selectable Schmitt trigger port inputs.
LED drive capability (20 mA) on all port pins.
Controlled slew rate port outputs to reduce EMI. Outputs
have approximately 10 ns minimum ramp times.
15 I/O pins minimum. Up to 18 I/O pins using on-chip
oscillator and reset options.
Only power and ground connections are required to operate
the 87LPC768 when fully on-chip oscillator and reset
options are selected.
Serial EPROM programming allows simple in-circuit
production coding. Two EPROM security bits prevent
reading of sensitive application programs.
Idle and Power Down reduced power modes. Improved
wakeup from Power Down mode (a low interrupt input
starts execution). Typical Power Down current is
1 microamp.
20-pin DIP and SO packages.
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