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參數(shù)資料
| 型號： | P89C669BBD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit microcontroller family with extended memory 96 kB Flash with 2 kB RAM |
| 中文描述： | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-389-1, LQFP-44 |
| 文件頁數(shù)： | 9/33頁 |
| 文件大小： | 827K |
| 代理商： | P89C669BBD |
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Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
Product data
Rev. 02 — 13 November 2003
9 of 33
9397 750 12299
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
P3.0 - P3.7
11,
13 - 19
5,
7 - 13
I/O
Port 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins
that have 1s written to them are pulled HIGH by the internal pull-ups and can be
used as inputs. As inputs, Port 3 pins that are externally pulled LOW will source
current because of the internal pull-ups.
P3.0, RXD0
–
Serial input port 0
P3.1, TXD0
–
Serial output port 0
P3.2, INT0
–
External interrupt 0
P3.3, INT1
–
External interrupt 1
P3.4, T0/CEX3
–
Timer0 external input/capture/compare external I/O for PCA module 3
P3.5, T1/CEX4
–
Timer1 external input/capture/compare external I/O for PCA module 3
P3.6, WR
–
External data memory write strobe
P3.7, RD
–
External data memory read strobe
RXD1
–
Serial input port 1 (with pull-up on pin)
TXD1
–
Serial output port 1 (with pull-up on pin)
Reset:
A HIGH on this pin for two machine cycles, while the oscillator is running,
resets the device. An internal diffused resistor to V
SS
permits a power-on reset
using only an external capacitor to V
DD
.
Address Latch Enable:
Output pulse for latching the LOW byte of the address
during an access to external memory. In normal operation, ALE is emitted at a
constant rate of
1
6
the oscillator frequency, and can be used for external timing
or clocking. Note that one ALE pulse is skipped during each access to external
data memory. ALE can be disabled by setting SFR AUXR.0. With this bit is set,
ALE will be active only during a MOVX instruction.
Program Store Enable:
The read strobe to external program memory. When
executing code from the external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each
access to external data memory. PSEN is not activated during fetches from
internal program memory.
External Access Enable/Programming Supply Voltage:
EA must be
externally held LOW to enable the device to fetch code from external program
memory locations. If EA is held HIGH, the device executes from internal program
memory. The value on the EA pin is latched when RST is released and any
subsequent changes have no effect.
Crystal 1:
Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
11
5
I
13
7
O
14
8
I
15
9
I
16
10
I
17
11
I
18
12
O
19
13
O
RXD1
12
6
I
TXD1
34
28
O
RST
10
4
I
ALE
33
27
O
PSEN
32
26
O
EA/V
PP
35
29
I
XTAL1
21
15
I
Table 3:
Symbol
Pin description
…continued
Pin
PLCC
LQFP
Type
Description
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