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參數資料
| 型號： | PC7410MGU500N |
| 廠商： | Atmel Corp. |
| 英文描述： | PowerPC 7410 RISC Microprocessor Product Specification |
| 中文描述： | 7410的PowerPC RISC微處理器產品規格 |
| 文件頁數： | 1/54頁 |
| 文件大小： | 692K |
| 代理商： | PC7410MGU500N |
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Rev. 2141D–HIREL–02/04
Features
22.8 SPECint95 (estimated), 17SPECfp95 at 500 MHz (estimated)
917MIPS at 500 MHz
Selectable Bus Clock (14 CPU Bus Dividers Up To 9x)
Seven Selectable Core-to-L2 Frequency Divisors
Selectable 603 Interface Voltage Below 3.3V (1.8V, 2.5V)
Selectable L2 interface of 1.8V or 2.5V
P
D
Typical 5.3W at 500 MHz, Full Operating Conditions
Nap, Doze and Sleep Modes for Power Saving
Superscalar (Four Instructions fetched per Clock Cycle)
4 GB Direct Addressing Range
Virtual Memory: 4 hexabytes (2
52
)
64-bit Data and 32-bit Address Bus Interface
32 KB Instruction and Data Cache
Eight Independent Execution Units and Three Register Files
Write-back and Write-through Operations
f
INT
Max = 450 MHz 500 MHz
f
BUS
Max = 133 MHz
Description
The PC7410 is the second microprocessor that uses the fourth (G4) full implementa-
tion of the PowerPC
Reduced Instruction Set Computer (RISC) architecture. It is
fully JTAG-compliant.
The PC7410 maintains some of the characteristics of G3 microprocessors:
The design is superscalar, capable of issuing three instructions per clock cycle
into eight independent execution units
The microprocessor provides four software controllable power-saving modes and
a thermal assist unit management
The microprocessor has separate 32-Kbyte, physically-addressed instruction and
data caches with dedicated L2 cache interface with on-chip L2 tags
In addition, the PC7410 integrates full hardware-based multiprocessing capability,
including a 5-state cache coherency protocol (4 MESI states plus a fifth state for
shared intervention) and an implementation of the new AltiVec
technology instruc-
tion set.
New features have been developed to make latency equal for double-precision and
single-precision floating-point operations involving multiplication. Additionally, in mem-
ory subsystem (MSS) bandwidth, the PC7410 offers an optional, high-bandwidth MPX
bus interface.
Unlike the PC7400, the PC7410 does not support the 3.3V I/O on the L2 cache
interface.
PowerPC 7410
RISC
Microprocessor
Product
Specification
PC7410
相關PDF資料 |
PDF描述 |
|---|---|
| PC7410 | PowerPC 7410 RISC Microprocessor Product Specification |
| PC7410MGHU400L | PowerPC 7410 RISC Microprocessor Product Specification |
| PC7410VGU450N | PowerPC 7410 RISC Microprocessor Product Specification |
| PC7410VGU500L | PowerPC 7410 RISC Microprocessor Product Specification |
| PC7410VGU500N | PowerPC 7410 RISC Microprocessor Product Specification |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PC7410VG400LE | 制造商:e2v technologies 功能描述:PC7410VG400LE - Trays |
| PC7410VG400NE | 制造商:e2v technologies 功能描述:PC7410VG400NE - Trays |
| PC7410VG450LE | 制造商:e2v technologies 功能描述:PC7410VG450LE - Trays |
| PC7410VG450NE | 制造商:e2v technologies 功能描述:PC7410VG450NE - Trays |
| PC7410VG500LE | 制造商:e2v technologies 功能描述:MPU 7410 RISC 64BIT 0.18UM 500MHZ 1.8V/2.5V/3.3V 360CBGA - Trays |
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