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參數資料
型號: PCA8514T
廠商: NXP Semiconductors N.V.
英文描述: Stand-alone OSD
中文描述: 單機OSD
文件頁數: 14/64頁
文件大小: 322K
代理商: PCA8514T
1995 Nov 27
14
Philips Semiconductors
Product specification
Stand-alone OSD
PCA8514
8.2
Loading character data into display RAM
Three registers are used to address and load data into the
display RAM. These registers are described below.
8.2.1
DCR A
DDRESS
R
EGISTER
(DCRAR)
Table 5
DCR Address Register
This register holds the address of the location in display
RAM into which data is to be written. Command 3 loads
the High nibble of the address into this register;
Command 4 loads the Low nibble of the address.
8.2.2
DCR A
TTRIBUTE
R
EGISTER
(DCRTR)
Table 6
DCR Attribute Register
The Attribute Register is loaded with character font
attribute data using Command 2. The data will be loaded
into bits <4-0> of the location in RAM addressed by the
contents of DCRAR. Bits 7 to 5 are not used and are
reserved.
8.2.3
DCR C
HARACTER
R
EGISTER
(DCRCR)
Table 7
DCR Character Register
This register holds the character font data loaded by
Command 5. The data will be loaded into bits <12-5> of
the location in RAM addressed by the contents of DCRAR.
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
7
6
5
4
3
2
1
0
T4
T3
T2
T1
T0
7
6
5
4
3
2
1
0
C6
C5
C4
C3
C2
C1
C0
8.3
Writing character data to display RAM
The procedure for writing character data to the display
RAM is as follows:
1.
Select the start address in display RAM. The start
address can take any value between 0 and 255.
Command 3 is used to load the High nibble of the start
address. Command 4 is used to load the Low nibble of
the start address. The start address is stored in
DCRAR.
2.
Load the character attributes into DCRTR using
Command 2. The actual attribute selected is
dependent upon whether the Character Font Code,
Carriage Return Code or Space Code has been
selected by Command 5 (see Section 8.1).
If the attributes of a series of displayed characters are
the same, the contents of this register need not be
updated.
3.
Load the Character Font data into DCTCR using
Command 5. This command signals that a complete
command byte is available and the data held in
registers DCRTR and DCRCR is loaded into the RAM
location pointed to by the address stored in DCRAR.
The address held in DCRAR is then incremented by ‘1’
pointing to the next RAM location in anticipation of the
next operation.
A description of all the Commands is given in Chapter 9.
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