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參數資料
型號: PCA8516T
廠商: NXP SEMICONDUCTORS
元件分類: 畫面疊加
英文描述: Stand-alone OSD
中文描述: ON-SCREEN DISPLAY IC, PDSO24
封裝: PLASTIC, SOP-24
文件頁數: 19/64頁
文件大小: 403K
代理商: PCA8516T
1995 Mar 30
19
Philips Semiconductors
Preliminary specification
Stand-alone OSD
PCA8516
9.4
Command 3
Table 19
Command 3 format
Command 3 loads the DCR Address Register with the
4 MSBs of the RAM address to which data will be written.
9.5
Command 4
Table 20
Command 4 format
Command 4 loads the DCR Address Register with the
4 LSBs of the RAM address to which data will be written.
9.6
Command 5
Table 21
Command 5 format
Command 5 is used to load character data into the DCR
Character Register. The data will specify either a
Character Font Code, the Test Code, the Carriage Return
Code or the Space Code. These codes are explained in
detail in Section 8.1.
9.7
Command 6
Table 22
Command 6 format
Command 6 loads the programmable 6-bit counter of the
OSD clock oscillator. The output frequency (f
OSD
) is a
function of the decimal value of the 6-bits loaded in by
Command 6; see Chapter 11.
BS1
BS0
7
6
5
4
3
2
1
0
0
0
0
0
1
1
A7
A6
A5
A4
BS1
BS0
7
6
5
4
3
2
1
0
0
0
0
0
1
1
A3
A2
A1
A0
BS1
BS0
7
6
5
4
3
2
1
0
1
0
1
C6
C5
C4
C3
C2
C1
C0
BS1
BS0
7
6
5
4
3
2
1
0
0
1
0
0
D5
D4
D3
D2
D1
D0
9.8
Command 7
Table 23
Command 7 format
This command loads Control Register 1 with data that
selects the scanning mode, the output polarity of signals
FB, ACM, R, G, B and I, and also enables/disables the
OSD clock.
With reference to the scanning modes: 1V/2V is the
conventional NTSC or PAL scanning mode; 1V/2H is the
Line Progress Scan used for the IDTV in NTSC and 2V/2H
is for the PAL system and is known as 50 Hz to 100 Hz
scan conversion.
Table 24
Selection of Scanning Mode
Table 25
Selection of output polarity (see Fig.13)
Table 26
OSD clock control
BS1
BS0
7
6
5
4
3
2
1
0
0
1
0
1
0
0
M1
M0
Bp
EN
M1
M0
SCAN MODE
0
0
1V/1H; NTSC 525LPF/60 Hz or
PAL 625LPF/50 Hz; see Fig.11. This is
the default setting.
reserved
1V/2H; NTSC 1050LPF/60 Hz; see
Fig.11.
2V/2H; PAL 1250LPF/100 Hz; see
Fig.12.
0
1
1
0
1
1
Bp
OUTPUT POLARITY (FB, ACM, R, G, B, I)
0
1
active LOW
active HIGH (the default setting)
EN
OSD CLOCK
0
1
disabled (the default setting)
enabled
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