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參數資料
| 型號： | PCA9548PW |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-channel I2C switch with reset |
| 中文描述： | 9548 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO24 |
| 封裝： | 4.40 MM, PLASTIC, SOT-355-1, MO-153, TSSOP-24 |
| 文件頁數： | 5/16頁 |
| 文件大小： | 125K |
| 代理商： | PCA9548PW |
Philips Semiconductors
Product data sheet
PCA9548
8-channel I
2
C switch with reset
2004 Sep 30
5
DEVICE ADDRESSING
Following a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9548 is
shown in Figure 3. To conserve power, no internal pullup resistors
are incorporated on the hardware selectable address pins and they
must be pulled HIGH or LOW.
A1 A0
1
1
0
A2
SW00915
1
R/W
FIXED
HARDWARE SELECTABLE
Figure 3. Slave address
The last bit of the slave address defines the operation to be
performed. When set to logic 1, a read is selected while a logic 0
selects a write operation.
CONTROL REGISTER
Following the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9548, which will be stored
in the control register. If multiple bytes are received by the
PCA9548, it will save the last byte received. This register can be
written and read via the I
2
C-bus.
B3
B2
B1
B0
SW00932
B7
B6
B5
B4
CHANNEL 0
CHANNEL 1
CHANNEL 2
CHANNEL 3
CHANNEL 4
CHANNEL 5
CHANNEL 6
CHANNEL 7
CHANNEL SELECTION BITS
(READ/WRITE)
6
5
4
2
1
0
7
3
Figure 4. Control register
CONTROL REGISTER DEFINITION
One or several SCx/SDx downstream pair, or channel, is selected
by the contents of the control register. This register is written after
the PCA9548 has been addressed. The 2 LSBs of the control byte
are used to determine which channel is to be selected. When a
channel is selected, the channel will become active after a stop
condition has been placed on the I
2
C-bus. This ensures that all
SCx/SDx lines will be in a HIGH state when the channel is made
active, so that no false conditions are generated at the time of
connection.
Table 1. Control Register; Write — Channel Selection/
Read — Channel Status
B7
B6
B5
B4
B3
B2
B1
B0
COMMAND
Channel 0
disabled
Channel 0
enabled
Channel 1
disabled
Channel 1
enabled
Channel 2
disabled
Channel 2
enabled
Channel 3
disabled
Channel 3
enabled
Channel 4
disabled
Channel 4
enabled
Channel 5
disabled
Channel 5
enabled
Channel 6
disabled
Channel 6
enabled
Channel 7
disabled
Channel 7
enabled
No channel
selected;
power-up/reset
default state
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
0
X
1
X
X
X
X
X
0
X
X
1
X
X
X
X
0
X
X
X
1
X
X
X
0
X
X
X
X
1
X
X
0
X
X
X
X
X
1
X
0
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
0
0
0
0
0
0
0
NOTE:
Several channels can be enabled at the same time.
Ex: B7 = 0, B6 = 1, B5 = 0, B4 = 0, B3 = 1, B2 = 1, B1 = 0, B0 = 0,
means that channels 7, 5, 4, 1, and 0 are disabled and channels 6,
3, and 2 are enabled.
Care should be taken not to exceed the maximum bus capacitance.
RESET INPUT
The RESET input is an active-LOW signal which may be used to
recover from a bus fault condition. By asserting this signal LOW for
a minimum of t
WL
, the PCA9548 will reset its registers and I
2
C state
machine and will deselect all channels. The RESET input must be
connected to V
DD
through a pull-up resistor.
POWER-ON RESET
When power is applied to V
DD
, an internal Power On Reset holds
the PCA9548 in a reset state until V
DD
has reached V
POR
. At this
point, the reset condition is released and the PCA9548 registers and
I
2
C state machine are initialized to their default states, all zeroes
causing all the channels to be deselected.
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| PCA9549BS,118 | 功能描述:數字總線開關 IC 8-BIT I2C BUS SWITCH RoHS:否 制造商:Texas Instruments 開關數量:24 傳播延遲時間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| PCA9549BS-T | 功能描述:數字總線開關 IC 8-BIT I2C BUS SWITCH W/RESET RoHS:否 制造商:Texas Instruments 開關數量:24 傳播延遲時間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| PCA9549D | 功能描述:數字總線開關 IC 8-BIT I2C BUS SWITCH W/RESET RoHS:否 制造商:Texas Instruments 開關數量:24 傳播延遲時間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
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