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參數資料
| 型號： | PCD5032H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編解碼器 |
| 英文描述： | ADPCM CODEC for digital cordless telephones |
| 中文描述： | ADPCM CODEC, PQFP44 |
| 封裝： | 14 X 14 MM, 2.20 MM HEIGHT, PLASTIC, SOT-205-1, QFP-44 |
| 文件頁數： | 12/24頁 |
| 文件大小： | 136K |
| 代理商： | PCD5032H |
1997 Apr 03
12
Philips Semiconductors
Product specification
ADPCM CODEC for digital cordless
telephones
PCD5032
7.3
Modes of operation
The ADPCM CODEC has a ‘Standby mode’, an ‘Active
mode’ and three operating modes: ‘Normal mode’ and two
loop modes. Table 5 gives details of setting the various
modes via the I
2
C-bus.
7.3.1
S
TANDBY MODE
After a reset the ADPCM CODEC will by default be in
standby mode. All I
2
C-bus settings will be cleared.
Standby mode can also be explicitly set using the code
shown in Table 5.
In standby mode all circuits are switched off, except for the
I
2
C-bus interface. Before going to standby mode the
PCD5032 performs a reset of the ADPCM transcoder,
digital filters and auxiliary logic functions. The I
2
C-bus
interface registers are not cleared.
7.3.2
A
CTIVE MODE
Active mode is set using the code shown in Table 5. Once
active mode has been set, the ADPCM CODEC is by
default in normal mode, but can explicitly be set to one of
the two test loops or back to normal mode using the codes
shown in Table 5.
7.3.3
T
EST LOOPS
Both test loops can be used for test or evaluation
purposes.
Loop 1 is intended for testing the audio path and A/D, D/A
converters, the ADPCM transcoder is not addressed in this
mode. The ADPCM data is directly looped back towards
the radio interface.
The PCM data is looped from transmit filter output to
receive filter input.
Loop 2 is intended for testing the audio path including
ADPCM encoding and decoding.
7.3.4
R
ESET
After an external reset pulse the circuit will perform an
internal reset procedure. The reset pulse must be active
for at least 10 CLK cycles. 125
μ
s (the duration of 1 cycle
at 8 kHz) after RESET has gone LOW, the internal reset is
completed and the PCD5032 goes into standby mode.
At that moment the ADPCM CODEC is ready to be
programmed.
A reset clears all I
2
C-bus registers and resets the ADPCM
transcoder, digital filters and auxiliary logic functions.
Table 5
Modes of operation
FUNCTION
I
2
C-CODE
DESCRIPTION
NOTE
Standby mode
Active mode
Normal mode
00XXX0XX
00XXX1XX
00XXXX00
Power-down
Active
Normal operation
default after reset
default after active
mode set
Loop 1
00XXXX01
Loopback on ADPCM side and on PCM side
without using ADPCM transcoder
Loopback on TM+/TM
through ADPCM
transcoder
Loop 2
00XXXX10
handbook, full pagewidth
MGK072
1
0
0
0
1
0
1
1
1
1
0
1
0
1
0
0
0
0
1 0
1 0
1
1
1
1 0
1 0
1 0
0
+
VDD
VDD
0
Fig.9 Tone output example.
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相關代理商/技術參數 |
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