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參數(shù)資料
型號: PCD5041
廠商: NXP SEMICONDUCTORS
元件分類: 無繩電話/電話
英文描述: DECT burst mode controller
中文描述: TELECOM, CORDLESS, BURST MODE CONTROLLER, PQFP64
封裝: 14 X 20 MM, 2.75 MM HEIGHT, PLASTIC, SOT-208-1, QFP-64
文件頁數(shù): 20/28頁
文件大小: 134K
代理商: PCD5041
1996 Oct 31
20
Philips Semiconductors
Objective specification
DECT burst mode controller
PCD5041
Notes to the characteristics
1.
V
DD
= 3.0 V; f
clk
=13.824 MHz; no external load; one speech link active (under typical conditions).
2.
V
DD
= 3.0 V; f
clk
=13.824 MHz; no external load; after reset.
3.
Maximum differential non-linearity at supply voltage 5.5 V and V
REF
= 1 V.
4.
Supply current I
DD(stb)(comp)
flows when COMP_NE is HIGH.
Supply current I
DD(idle)(comp)
flows when the comparator is in active mode (COMP_NE is LOW). It is the DC current
of the comparator when it is not switching, and V(COMP_INP) < V(COMP_INM).
The active mode supply current I
DD(1MHz)
includes the output pulse rate of 1 MHz.
5.
For input pins COMP_INP, COMP_INM, COMP_NE.
6.
For input pin COMP_NE.
7.
The minimum input common mode voltage will be measured at DC levels with, COMP_INM at 1 V DC
±
30 mV.
The same goes for the maximum input common mode voltage at (V
DD
0.5V).
8.
These values are not tested in production, and are based upon theoretical estimates and laboratory tests.
9.
The propagation delay t
pd
is measured from the time the differential input voltage equals the offset voltage, to the
50% point of the output transition. The initial differential input voltage is 100 mV and the propagation delay is
specified for an input overdrive of 30 mV, and a load capacitance of 50 pF. t
pd
is valid for both the positive and
negative going output transition. The maximum value is valid for the total ranges of temperature, supply voltage and
common mode input voltage. The worst case operation conditions are at the minimum supply voltage, the lowest
operating temperature and the minimum input common mode voltage. The delay difference
t
pd
gives the difference
between t
pd
for the rising output transition and t
pd
for the falling output transition and is valid for all operating
conditions. The test method to check the maximum delay difference is by measuring the RMS voltage of the output
signal.
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