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參數資料
| 型號： | PCD5093 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | DECT baseband controller |
| 中文描述： | 無繩基帶控制器 |
| 文件頁數： | 8/16頁 |
| 文件大小： | 85K |
| 代理商： | PCD5093 |
1997 Jul 21
8
Philips Semiconductors
Objective specification
DECT baseband controller
PCD5093
P3.6
P3.7
P2.0
P2.1
P2.2
A16
V
DD5V_2
V
SS4
TST1
TST2
P2.3
P2.4
P2.5
P2.6
P2.7
PSE
ALE
EA
V
SS5
V
DD5V_3
P0.7
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
I/O
I/O
I/O
I/O
I/O
O
I
I
I/O
I/O
I/O
I/O
I/O
O
O
I
I/O
H
H
H
H
H
L
H
H
H
H
H
H
H
off
H
off
H
off
H
off
H
off
H
off
H
off
H
off
H
H
ISQ2CPES
ISQ2CPES
ISQ2CPES
ISQ2CPES
ISQ2CPES
ISP4DPES
supply
supply
DIDP0PES
DIDP0PES
ISQ2CPES
ISQ2CPES
ISQ2CPES
ISQ2CPES
ISQ2CPES
ISQ2CPES
ISQ4CPES
ISF2DPES
supply
supply
ISP2DPES
ISQ2CPES
ISP2DPES
ISQ2CPES
ISP2DPES
ISQ2CPES
ISP2DPES
ISQ2CPES
ISP2DPES
ISQ2CPES
ISP2DPES
ISQ2CPES
ISP2DPES
ISQ2CPES
ISP2DPES
ISQ2CPES
DIDP0PES
ISF2DPES
bidirectional 80C51 port pin
bidirectional 80C51 port pin
bidirectional 80C51 port pin
bidirectional 80C51 port pin
bidirectional 80C51 port pin
address bit 16 for 128 kbytes external program memory
positive supply voltage 2 for the +5 V interface
negative supply voltage 4
test input 1
test input 2
bidirectional 80C51 port pin
bidirectional 80C51 port pin
bidirectional 80C51 port pin
bidirectional 80C51 port pin
bidirectional 80C51 port pin
program store enable (80C51); active LOW
address latch enable (80C51)
external access enable (80C51); active LOW
negative supply voltage 5
positive supply voltage 3 for the +5 V interface
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)
master reset input (Schmitt trigger)
reset output
P0.6
92
I/O
P0.5
93
I/O
P0.4
94
I/O
P0.3
95
I/O
P0.2
96
I/O
P0.1
97
I/O
P0.0
98
I/O
M_RESET
RESET_OUT
99
100
I
O
SYMBOL
PIN
I/O
STATE
AFTER
RESET
PIN TYPE
PIN DESCRIPTION
相關PDF資料 |
PDF描述 |
|---|---|
| PCD5093H | DECT baseband controller |
| PCD5094 | DECT baseband controller |
| PCD5094H | DECT baseband controller |
| PCD5095 | DECT baseband controller |
| PCD5095H | DECT baseband controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PCD5093H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
| PCD5094 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
| PCD5094H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
| PCD5095 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
| PCD5095H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
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