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參數資料
| 型號： | PCD6003U |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網絡 |
| 英文描述： | Digital telephone answering machine chip |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, UUC |
| 文件頁數： | 17/96頁 |
| 文件大小： | 385K |
| 代理商： | PCD6003U |
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2001 Apr 17
17
Philips Semiconductors
Product specification
Digital telephone answering machine chip
PCD6003
Table 6 shows the input clock selection in the analog
section of the chip. Note that for 3.456 and 3.58 MHz
crystal input clock, no clock division is done prior to
inputting it to the PLL. After reset the input clock division
rate is by default 1. This means that applications using an
input clock frequency other than 3.456 or 3.580 MHz, will
have to set the proper division rate, after system start-up.
Otherwise proper functionality of the analog blocks is not
guaranteed.
Table 7 shows the microcontroller clock frequencies.
In Emergency mode (bit 7 of CKCON reset), the
EMG_CLK is input directly to the microcontroller. The
values of CKCON bits 2 and 3 are then irrelevant. Note
that Emergency mode operation is only designed for
start-up and POTS mode condition. Peripheral blocks
(such as the CODECs and the IOM block) are not
guaranteed to work when CKCON bit 7 is reset.
Table 6
Input clock selection
Note
1.
The PCD6003 timing system is based on the 3.456 MHz (or multiples) input clock frequency. In order to be able to
use the low cost 3.58 MHz crystal or ceramic resonator, a clock frequency correction is needed for some blocks
(RTC, CODEC and IOM). IOM will only operate in Master mode.
Table 7
Microcontroller clock selection
Notes
1.
2.
6 clocks/cycle.
If the PLL is switched off when not in Emergency mode, the selected clock would not be available. The micro would
hang up. Before CKCON.7 is set to logic 1, SYMOD.5 must be set to logic 1 to activate the PLL.
CKCON.6
(RTC MODE)
SYMOD.7
(input clock 1)
SYMOD.6
(input clock 0)
INPUT CLOCK
DIVISION RATIO
CHIP INPUT CLOCK
FREQUENCY (MHz)
0
1
0
0
0
0
0
1
0
0
1
0
1
1
2
4
3.456
3.580
(1)
6.912
13.824
CKCON.7
(EMG mode)
CKCON.3
(micro clock 1)
CKCON.2
(micro clock 0)
SYMOD.5
PLL on/off
MICROCONTROLLER
CLOCK FREQUENCY
(1)
0
1
1
1
1
1
X
X
0
0
1
1
X
X
0
1
0
1
X
0
1
1
1
1
EMG_CLK
do not use
(2)
CLK_1
CLK_7
CLK_14
CLK_21
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