- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382382 > PCF8591 (NXP Semiconductors N.V.) 8-bit A/D and D/A converter PDF資料下載
參數(shù)資料
| 型號： | PCF8591 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit A/D and D/A converter |
| 中文描述： | 8位A / D和D / A轉(zhuǎn)換器 |
| 文件頁數(shù)： | 14/28頁 |
| 文件大小： | 221K |
| 代理商： | PCF8591 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當(dāng)前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
1998 Jul 02
14
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
8.3
System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
8.4
Acknowledge
The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.
Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by
the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is
addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that
acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW
during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the
transmitter by
not
generating an acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a stop condition.
Fig.13 System configuration.
MBA605
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER /
RECEIVER
SDA
SCL
Fig.14 Acknowledgement on the I
2
C-bus.
handbook, full pagewidth
MBC602
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCA8591 | 8-bit A/D and D/A converter |
| PCA8591P | 8-bit A/D and D/A converter |
| PCA8591T | 8-bit A/D and D/A converter |
| PCF8598C-2P02 | 1024 ⅴ 8-bit CMOS EEPROM with I2C-bus interface |
| PCF8598C-2T02 | 1024 ⅴ 8-bit CMOS EEPROM with I2C-bus interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCF8591_03 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit A/D and D/A converter |
| PCF8591P | 制造商:NXP Semiconductors 功能描述:Codec General Purpose 1-CH 8Bit 3.3V/5V 16-Pin PDIP Bulk 制造商:NXP Semiconductors 功能描述:Codec General Purpose 1-CH 8Bit 3.3V/5V 16-Pin PDIP Bulk Bulk 制造商:NXP Semiconductors 功能描述:IC 8-BIT ADC/DAC 制造商:NXP Semiconductors 功能描述:IC, 8-BIT ADC/DAC 制造商:NXP Semiconductors 功能描述:IC, A/D AND D/A CONVERTER, 8BIT, 16-DIP; IC Function:A/D and D/A Converter; Brief Features:Low Standby Current, Auto Incremented Channel Selection, On Chip Track and Hold Circuit; Supply Voltage Min:2.5V; Supply Voltage Max:6V ;RoHS Compliant: Yes |
| PCF8591P,112 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC ADC/DAC 8-BIT I2C RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| PCF8591P112 | 制造商:NXP Semiconductors 功能描述:IC ADC-DAC 8BIT DIP-16 |
| PCF8591PN | 制造商:NXP Semiconductors 功能描述:Codec General Purpose 1-CH 8bit 3.3V/5V 16-Pin PDIP Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。