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參數資料
| 型號： | PCM1605Y |
| 英文描述： | 24-Bit, 192kHz Sampling,6-Channel, Enhanced Multi-Level, Delta-Sigma DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 24位192kHz采樣,6 -通道，增強的多級，Δ-Σ數字模擬轉換器 |
| 文件頁數： | 14/32頁 |
| 文件大小： | 263K |
| 代理商： | PCM1605Y |
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14
PCM1604, PCM1605
REGISTER WRITE OPERATION
All Write operations for the serial control port use 16-bit data
words. Figure 6 shows the control data word format. The most
significant bit is the Read/Write (R/W) bit. When set to ‘0’, this
bit indicates a Write operation. There are seven bits, labeled
IDX[6:0], that set the register index (or address) for the Write
operation. The least significant eight bits, D[7:0], contain the
data to be written to the register specified by IDX[6:0].
Figure 7 shows the functional timing diagram for writing the
serial control port. ML is held at a logic ‘1’ state until a register
needs to be written. To start the register write cycle, ML is set
to logic ‘0’. Sixteen clocks are then provided on MC, corre-
sponding to the 16-bits of the control data word on MDI. After
the sixteenth clock cycle has completed, ML is set to logic ‘1’
to latch the data into the indexed mode control register.
IDX5
IDX6
R/W
IDX4
IDX2
IDX3
IDX1
IDX0
D7
D6
D5
D4
D3
D2
D1
D0
MSB
Register Index (or Address)
Read/Write Operation
0 = Write Operation
1 = Read Operation (register index is ignored)
Register Data
LSB
FIGURE 6. Control Data Word Format for MDI.
FIGURE 7. Write Operation Timing.
SINGLE REGISTER READ OPERATION
Read operations utilize the 16-bit control word format shown
in Figure 6. For Read operations, the Read/Write (R/W) bit is
set to ‘1’. Read operations ignore the index bits, IDX[6:0], of
the control data word. Instead, the REG[6:0] bits in Control
Register 11 are used to set the index of the register that is to be
read during the Read operation. Bits IDX[6:0] should be set to
00
H
for Read operations.
Figure 8 details the Read operation. First, Control Register 11
must be written with the index of the register to be read back.
Additionally, the INC bit must be set to logic ‘0’ in order to
disable the Auto-Increment Read function. The Read cycle is
then initiated by setting ML to logic ‘0’ and setting the R/W bit
of the control data word to logic ‘1’, indicating a Read
operation. MDO remains at a high-impedance state until the
0
D7
D6
D5
D4
D3
D2
D15 D14
D1
D0
X
X
X
IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0
ML
MC
MDI
FIGURE 5. Audio Interface Timing.
SYMBOL
PARAMETER
MIN
MAX
UNITS
t
BCY
t
BCH
t
BCL
t
BL
t
LB
t
DS
t
DH
BCK Pulse Cycle Time
BCK High Level Time
BCK Low Level Time
BCK Rising Edge to LRCK Edge
LRCK Falling Edge to BCK Rising Edge
DIN Set Up Time
DIN Hold Time
48 or 64f
S(1)
35
35
10
10
10
10
ns
ns
ns
ns
ns
ns
NOTE: (1) f
S
is the sampling frequency (e.g., 44.1kHz, 48kHz, 96kHz, etc.)
LRCK
BCK
DATA1-DATA3
50% of V
DD
50% of V
DD
50% of V
DD
t
BCH
t
BCL
t
LB
t
BL
t
DS
t
DH
t
BCY
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PCM1606 | 制造商:BB 制造商全稱:BB 功能描述:24-BIT, 192-kHz SAMPLING, 6-CHANNEL, ENHANCED MULTILEVEL, DELTA-SIGMA DIGITAL-TO-ANALOG CONVERTER |
| PCM1606E | 功能描述:音頻數/模轉換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1606E/2K | 功能描述:音頻數/模轉換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1606E/2KG4 | 功能描述:音頻數/模轉換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1606EG/2K | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
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