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參數(shù)資料
| 型號(hào)： | PCM1800 |
| 英文描述： | Single-Ended Analog Input 20-Bit Stereo ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 單端模擬輸入20位立體聲模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 13/15頁(yè) |
| 文件大小： | 172K |
| 代理商： | PCM1800 |
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13
PCM1800
FIGURE 8. Audio Data Interface Timing (Master Mode: FSYNC, LRCK, and BCK are outputs).
LRCIN
FSYNC
0.5V
DD
0.5V
DD
0.5V
DD
0.5V
DD
BCKIN
DOUT
t
BCKH
t
CKFS
t
FSYP
t
LRCP
t
CKDO
t
LRDO
t
CKLR
t
BCKP
t
BCKL
DESCRIPTION
SYMBOL
MIN
TYP
MAX
UNITS
BCK Period
BCK Pulsewidth HIGH
BCK Pulsewidth LOW
Delay Time BCK Falling Edge to LRCK Valid
LRCK Period
Delay Time BCK Falling Edge to FSYNC Valid
FSYNC Period
Delay Time BCK Falling Edge to DOUT Valid
Delay Time LRCK Edge to DOUT Valid
Rising Time of All Signals
Falling Time of All SIgnals
t
BCKP
t
BCKH
t
BCKL
t
CKLR
t
LRCP
t
CKFS
t
FSYP
t
CKDO
t
LRDO
t
RISE
t
FALL
300
150
150
–20
20
–20
10
–20
–20
1/64f
S
600
300
300
40
40
40
40
40
40
20
20
ns
ns
ns
ns
μ
s
ns
μ
s
ns
ns
ns
ns
1/f
S
1/2 f
S
NOTE: Timing measurement reference level is (V
/V
)/2. Rising and falling time is measured from 10% to
90% of I/O signals’ swing. Load capacitance of DOUT signal is 20pF.
FIGURE 7. Audio Data Interface Timing (Slave Mode: FSYNC, LRCK, and BCK are inputs).
LRCK
FSYNC
1.4V
1.4V
1.4V
0.5V
DD
BCK
DOUT
t
BCKH
t
FSSU
t
LRCP
t
CKDO
t
LRDO
t
BCKP
t
BCKL
t
LRHD
t
LRSU
t
FSHD
DESCRIPTION
SYMBOL
MIN
TYP
MAX
UNITS
BCK Period
BCK Pulsewidth HIGH
BCK Pulsewidth LOW
LRCK Set Up Time to BCK Rising Edge
LRCK Hold Time to BCK Rising Edge
LRCK Period
FSYNC Set Up Time to BCK Rising Edge
FSYNC Hold Time to BCK Rising Edge
Delay Time BCK Falling Edge to DOUT Valid
Delay Time LRCK Edge to DOUT Valid
Rising Time of All Signals
Falling Time of All Signals
t
BCKP
t
BCKH
t
BCKL
t
LRSU
t
LRHD
t
LRCP
t
FSSU
t
FSHD
t
CKDO
t
LRDO
t
RISE
t
FALL
300
120
120
80
40
20
40
40
–20
–20
ns
ns
ns
ns
ns
μ
s
ns
ns
ns
ns
ns
ns
40
40
20
20
NOTE: Timing measurement reference level is (V
/V
)/2. Rising and falling time is measured from 10% to
90% of I/O signals’ swing. Load capacitance of DOUT signal is 20pF.
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PDF描述 |
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| PCM1800E | Single-Ended Analog Input 20-Bit Stereo ANALOG-TO-DIGITAL CONVERTER |
| PCM1801 | 16-Bit, Stereo, Audio ANALOG-TO-DIGITAL CONVERTER |
| PCM1801U | 16-Bit, Stereo, Audio ANALOG-TO-DIGITAL CONVERTER |
| PCM1804 | FULL DIFFERENTIAL ANALOG INPUT 24-BIT, 192-kHz STEREO A/D CONVERTER |
| PCM1804DB | FULL DIFFERENTIAL ANALOG INPUT 24-BIT, 192-kHz STEREO A/D CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCM-1800-1824 | 制造商:Panduit Corp 功能描述:Call vendor for pricing |
| PCM1800E | 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC Sngl-End Analog Inp 20-Bit Stereo ADC RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: 封裝: |
| PCM1800E | 制造商:Texas Instruments 功能描述:20BIT AUDIO DAC SMD 1800 SSOP24 制造商:Texas Instruments 功能描述:20BIT AUDIO DAC, SMD, 1800, SSOP24 制造商:Texas Instruments 功能描述:20BIT AUDIO DAC, SMD, 1800, SSOP24; Resolution (Bits):20bit; Sampling Rate:48kSPS; Supply Voltage Type:Single; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Supply Current:18mA; Digital IC Case Style:SSOP; No. of Pins:24; Input ;RoHS Compliant: Yes |
| PCM1800E/2K | 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC Sngl-End Analog Inp 20-Bit Stereo ADC RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: 封裝: |
| PCM1800E/2KG4 | 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC Sngl-End Analog Inp 20-Bit Stereo ADC RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: 封裝: |
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