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參數(shù)資料
| 型號： | PCM1801 |
| 英文描述： | 16-Bit, Stereo, Audio ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 16位，立體聲，音頻模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 101K |
| 代理商： | PCM1801 |
11
PCM1801
RESET
PCM1801 has an internal power-on reset circuit, which ini-
tializes (resets) when the supply voltage (V
CC
/V
DD
) exceeds
4.0V (typ). The PCM1801 stays in the reset state and the
digital output is forced to zero. The digital output is valid after
reset state release and 18436f
S
periods. During reset, the logic
circuits and the digital filter stop operating. Figure 3 illustrates
the internal power-on reset timing.
FIGURE 3. Internal Power-On Reset Timing.
1024 System Clock Periods
Reset
Reset Removal
4.4V
4.0V
3.6V
V
CC
/V
DD
Internal Reset
System Clock
FMT
DATA FORMAT
0 (L)
1 (H)
16-Bit, Left-Justified
16-Bit, I
2
S
TABLE II. Data Format.
FIGURE 4. Audio Data Format (Slave Mode: LRCK, and BCK are inputs).
L–ch
R–ch
FMT = L
16-Bit, MSB-First, Left-Justified
FMT = H
16-Bit, MSB-First, I
2
S
MSB
LSB
LRCK
BCK
DOUT
MSB
LSB
1
2
3
14 15 16
14 15 16
1
2
3
1
L-ch
R-ch
MSB
LSB
LRCK
BCK
DOUT
MSB
LSB
1
2
3
14 15 16
1
2
3
14 15 16
SERIAL AUDIO DATA INTERFACE
The PCM1801 interfaces the audio system through BCK (pin
6), LRCK (pin 7), and DOUT (pin 8).
DATA FORMAT
PCM1801 supports two audio data formats in Slave Mode,
and are selected by the FMT control input (pin 10) as shown
in Table II.
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