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參數資料
| 型號： | PCM3003 |
| 元件分類： | Codec |
| 英文描述： | 16-/20-Bit Single-Ended Analog Input/Output STEREO AUDIO CODECs |
| 中文描述： | 16-/20-Bit單端模擬輸入/輸出立體聲編解碼器 |
| 文件頁數： | 2/23頁 |
| 文件大小： | 206K |
| 代理商： | PCM3003 |
PCM3002/3003
2
SPECIFICATIONS
All specifications at +25
°
C, V
DD
= V
CC
= 3.0V, f
S
= 44.1kHz, SYSCLK = 384f
S
, and 16-bit data, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no
responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice.
No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN
product for use in life support devices and/or systems.
NOTES: (1) Pins 7, 8, 17 and 18: RST, ML, MD, MC for the PCM3002; PDAD, PDDA, DEM1, DEM0 for PCM3003 (Schmitt-Trigger input with 100k
typical internal
pull-down resistor). (2) Pins 9, 10, 11, 15: SYSCLK, LRCIN, BCKIN, DIN (Schmitt Trigger input). (3) Pin16: 20BIT for PCM3003 (Schmitt-Trigger input, 100k
typical internal pull-down resistor). (4) Pin 12: DOUT. (5) Pin 16: ZFLG (open drain output). (6) High Pass Filter for Offset Cancel. (7) Refer to Application Bulletin
AB-148 for information relating to operation at lower sampling frequencies. (8) f
= 1kHz, using Audio Precision System II, rms mode with 20kHz LPF, 400Hz
HPF used for performance calculation. (9) f
= 1kHz, using Audio Precision System II, rms mode with 20kHz LPF, 400Hz HPF used for performance calculation.
(10) Applies for voltages between 2.4V to 2.7V for 0
°
C to +70
°
C and 256f
S
/512f
S
operation (384f
S
not available). (11) SYSCLK, BCKIN, and LRCIN are stopped.
PCM3002E/3003E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUT/OUTPUT
Input Logic
Input Logic Level: V
IH(1, 2, 3)
0.7 x V
DD
VDC
VDC
μ
A
μ
A
V
IL(1, 2, 3)
0.3 x V
DD
±
1
100
Input Logic Current: I
IN(2)
Input Logic Current: I
IN(1)
Output Logic
Output Logic Level: V
OH(5)
I
OUT
= –1mA
I
OUT
= +1mA
I
OUT
= +1mA
V
DD
–0.3
VDC
VDC
VDC
V
OL(5)
0.3
0.3
Output Logic Level: V
OL(4)
CLOCK FREQUENCY
Sampling Frequency (f
S
)
System Clock Frequency
32
(7)
8.1920
12.2880
16.3840
44.1
11.2896
16.9344
22.5792
48
kHz
MHz
MHz
MHz
256f
S
384f
S
512f
S
12.2880
18.4320
24.5760
ADC CHARACTERISTICS
RESOLUTION
20
Bits
DC ACCURACY
Gain Mismatch Channel-to-Channel
Gain Error
Gain Drift
Bipolar Zero Error
Bipolar Zero Drift
±
1.0
±
2.0
±
20
±
1.7
±
20
±
3.0
±
5.0
% of FSR
% of FSR
ppm of FSR/
°
C
% of FSR
ppm of FSR/
°
C
High-Pass Filter Disabled
(6)
High-Pass Filter Disabled
(6)
DYNAMIC PERFORMANCE
(8)
THD+N: V
IN
= –0.5dB
V
IN
= –60dB
Dynamic Range
Signal-to-Noise Ratio
Channel Separation
–86
–28
90
90
88
–80
dB
dB
dB
dB
dB
A-Weighted
A-Weighted
86
86
84
DIGITAL FILTER PERFORMANCE
Passband
Stopband
Passband Ripple
Stopband Attenuation
Delay Time
HPF Frequency Response
0.454f
S
Hz
Hz
dB
dB
sec
mHz
0.583f
S
±
0.05
–65
17.4/f
S
0.019f
S
–3dB
ANALOG INPUT
Voltage Range
Center Voltage
Input Impedance
Anti-Aliasing Filter Frequency Response
0.60 V
CC
0.50 V
CC
30
150
Vp-p
V
k
kHz
–3dB
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