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參數(shù)資料
| 型號： | PDSP16116A |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 16 by 16 Bit Complex Multiplier |
| 中文描述： | 16 16位復(fù)合乘法器 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 157K |
| 代理商： | PDSP16116A |
1
Ordering Information
10MHz
PDSP16116 MC GC1R
MIL-883 screened -
ceramic QFP
MIL-883 screened -
PGA package
MIL-883 screened -
ceramic QFP
MIL-883 screened -
PGA package
PDSP16116 MC AC1R
10MHz
PDSP16116A MC GC1R
20MHz
PDSP16116A MC AC1R
20MHz
PDSP16116/A/MC
16 by 16 Bit Complex Multiplier
DS3858
ISSUE 3.0
June 2000
Fig.1 Simplified Block Diagram
REG
REG
REG
REG
REG
REG
REG
SHIFT
REG
SHIFT
REG
+/-
+/-
REG
MULT
MULT
MULT
MULT
XR
XI
YR
YI
PR
PI
The PDSP16116A will multiply two complex (16 + 16) bit
words every 50ns and can be configured to output the
complete complex (32 + 32) bit result within a single cycle. The
data format is fractional two's complement.
The PDSP16116/A contains four 16 x 16 Array Multipliers,
two 32 bit Adder/Subtractors and all the control logic required
to support Block Floating Point Arithmetic as used in FFT
applications. In combination with a PDSP16318, the
PDSP16116A forms a two chip 10MHz Complex Multiplier
Accumulator with 20 bit accumulator registers and output
shifters. The PDSP16116 in combination with two
PDSP16318s and two PDSP1601s forms a complete 10MHz
Radix 2 DIT FFT Butterfly solution which fully supports Block
Floating Point Arithmetic. The PDSP16116/A has an
extremely high throughput that is suited to recursive
algorithms as all calculations are performed with a single
pipeline delay (two cycle fall-through).
FEATURES
I
I
I
I
I
I
I
I
I
I
Complex Number (16 + 16) X (16 + 16) Multiplication
Full 32 bit Result
20MHz Clock Rate
Block Floating Point FFT Butterfly Support
-1 times -1 Trap
Two's Complement Fractional Arithmetic
TTL Compatible I/O
Complex Conjugation
2 Cycle Fall Through
144 pin PGA or QFP packages
APPLICATION
ASSOCIATED PRODUCTS
PDSP16318/A
PDSP16112/A
PDSP16330/A
PDSP1601/A
PDSP16350
PDSP16256
PDSP16510
Complex Accumulator
(16 + 16) X (12 + 12) Complex Multiplier
Pythagoras Processor
ALU and Barrel Shifter
Precision Digital Modulator
Programmable FIR Filter
Single Chip FFT Processor
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Fast Fourier Transforms
Digital Filtering
Radar and Sonar Processing
Instrumentation
Image Processing
CHANGE NOTIFICATION
The change notification requirements of MIL-M-38510 will be
implemented on this device type. Known customers will be
notified of any changes since last buy when ordering further
parts if significant changes have been made.
Rev
A
B
C D
Date
JULY 1993 OCT 1998 JUN 2000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PDSP16116AMC | 16 by 16 Bit Complex Multiplier |
| PDSP16116AMCAC1R | 16 by 16 Bit Complex Multiplier |
| PDSP16116AMCGC1R | 16 by 16 Bit Complex Multiplier |
| PDSP16116MC | 16 by 16 Bit Complex Multiplier |
| PDSP16116MCAC1R | 16 by 16 Bit Complex Multiplier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDSP16116A0AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier |
| PDSP16116AA0AC | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:16 X 16 Bit Complex Multiplier |
| PDSP16116AA0GG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier |
| PDSP16116AB0AC | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:16 X 16 Bit Complex Multiplier |
| PDSP16116AB0GG | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:16 X 16 Bit Complex Multiplier |
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