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參數資料
| 型號： | PDU138-2 |
| 廠商： | DATA DELAY DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3-BIT PROGRAMMABLE DELAY LINE (SERIES PDU138) |
| 中文描述： | ACTIVE DELAY LINE, TRUE OUTPUT, PDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數： | 1/5頁 |
| 文件大小： | 59K |
| 代理商： | PDU138-2 |
PDU138
Doc #02004
5/6/02
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
3-BIT PROGRAMMABLE
DELAY LINE
(SERIES PDU138)
FEATURES
PACKAGES
Digitally programmable in 8 delay steps
Monotonic delay-versus-address variation
Precise and stable delays
Input & outputs fully TTL interfaced & buffered
10 T
2
L fan-out capability
Fits standard 16-pin DIP socket
Auto-insertable
FUNCTIONAL DESCRIPTION
The PDU138-series device is a 3-bit digitally programmable delay line.
The delay, TD
A
, from the input pin (IN) to the output pin (OUT) depends on
the address code (A2-A0) according to the following formula:
TD
A
= TD
0
+ T
INC
* A
where A is the address code, T
INC
is the incremental delay of the device,
and TD
0
is the inherent delay of the device. The incremental delay is
specified by the dash number of the device and can range from 0.5ns
through 50ns, inclusively. The enable pin (EN/) is held LOW during normal
operation. When this signal is brought HIGH, OUT is forced into the LOW
state. The address is not latched and must remain asserted during normal operation.
SERIES SPECIFICATIONS
Total programmed delay tolerance:
5% or 1ns,
whichever is greater
Inherent delay (TD
0
):
7ns typical (OUT)
Setup time and propagation delay:
Address to input setup (T
AIS
):
Disable to output delay (T
DISO
):
12ns typ.
Operating temperature:
0
°
to 70
°
C
Temperature coefficient:
100PPM/
°
C (excludes TD
0
)
Supply voltage V
CC
:
5VDC
±
5%
Supply current:
I
CCH
= 45ma
I
CCL
= 20ma
Minimum pulse width:
20% of total delay
12ns typ.
2002 Data Delay Devices
data
delay
devices,
inc.
3
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
N/C
N/C
N/C
IN
OUT
N/C
EN/
GND
VCC
N/C
N/C
N/C
N/C
A0
A1
A2
PDU138-xx
PDU138-xxM
DIP
Military DIP
PIN DESCRIPTIONS
IN
OUT
A2
A1
A0
EN/
VCC
GND
Delay Line Input
Non-inverted Output
Address Bit 2
Address Bit 1
Address Bit 0
Output Enable
+5 Volts
Ground
DASH NUMBER SPECIFICATIONS
Part
Number
PDU138-.5
PDU138-1
PDU138-2
PDU138-5
PDU138-10
PDU138-12
PDU138-15
PDU138-20
PDU138-40
PDU138-50
Incremental Delay
Per Step (ns)
.5
±
.3
1
±
.4
2
±
.4
5
±
.6
10
±
1.0
12
±
1.2
15
±
1.3
20
±
1.5
40
±
2.0
50
±
2.5
Total Delay
Change (ns)
3.5
±
1.0
7
±
1.0
14
±
1.0
35
±
1.8
70
±
3.5
84
±
4.2
105
±
5.3
140
±
7.0
280
±
14.0
350
±
17.5
NOTE: Any dash number between .5 and 50 not
shown is also available.
相關PDF資料 |
PDF描述 |
|---|---|
| PDU138-20 | 3-BIT PROGRAMMABLE DELAY LINE (SERIES PDU138) |
| PDU138-40 | 3-BIT PROGRAMMABLE DELAY LINE (SERIES PDU138) |
| PDU138-5 | 3-BIT PROGRAMMABLE DELAY LINE (SERIES PDU138) |
| PDU138-50 | 3-BIT PROGRAMMABLE DELAY LINE (SERIES PDU138) |
| PDU13F-.5 | 3-BIT PROGRAMMABLE DELAY LINE (SERIES PDU13F) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PDU-138-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Delay Line |
| PDU138-20 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:3-BIT PROGRAMMABLE DELAY LINE (SERIES PDU138) |
| PDU-138-20M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Delay Line |
| PDU-138-2M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Delay Line |
| PDU-138-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Delay Line |
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