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參數(shù)資料
型號: PEEL22CV10AZ
英文描述: CMOS Programmable Electrically Erasable Logic Device
中文描述: 的CMOS電可擦除可編程邏輯器件
文件頁數(shù): 1/10頁
文件大小: 475K
代理商: PEEL22CV10AZ
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent
accompany the sale of the product.
Rev. 1.0 Dec 16, 2004
1/10
Features
PEEL 22CV10AZ
-25
CMOS
Programmable Electrically Erasable
Logic Device
Architectural Flexibility
-
133
product terms x 44 input AND
array
Ultra Low
Power Operation
- V
CC
= 5 Volts ±10%
-
Icc = 10 μA (typical) at standby
-
Icc = 2 mA (typical) at 1 MHz
- t
PD
= 25ns.
CMOS Electrically Erasable
Technology
-
Superior factory testing
-
Reprogrammable in plastic package
-
Reduces retrofit and development
costs
Development/Programmer Support
-
Third party software and programmers
- Anachip PLACE
Development
Software
-
Up to 22 inputs
and 10 I/O pins
-
12 possible macrocell configurations
-
Synchronous
preset, asynchronous clear
-
Independent output enables
-
Programmable clock source and polarity
-
24-pin DIP/SOIC/TSSOP and 28-pin
PLCC
Application Versatility
-
Replaces random
logic
-
Pin and JEDEC
compatible
with 22V10
-
Ideal for power-sensitive systems
General Description
The PEEL22CV10AZ
is
a Programmable Electrically Erasable
Logic
(PEEL) device that
provides
a low
power alternative to
ordinary PLDs. The
PEEL22CV10AZ is available in 24-pin
DIP, SOIC,
TSSOP and 28-pin PLCC packages (see Figure 19). A
“zero-power”
(100μA
max.
I
CC
)
standby
mode
makes
the
PEEL22CV10AZ
ideal
for power sensitive applications such as
handheld meters,
portable communication
equipment and
lap- top
computers/ peripherals. EE-reprogrammability provides the
convenience
of instant reprogramming for
development
and a
reusable
production
inventory
minimizing
the
impact
of
pro-
gramming
changes
or
errors.
EE-reprogrammability
also
improves factory testability, thus
ensuring the highest quality
possible.
Figure 19 Pin Configuration
The PEEL22CV10AZ
is JEDEC file compatible
with standard
22V10
PLDs. Eight additional configurations per macrocell (a
total of 12) are
also available by
using
the
“+” software/program-
ming option
(i.e., 22CV10AZ+ &
22CV10AZ++). The additional
macrocell configurations allow more logic to be put
into every
device, potentially reducing
the
design's component count
and
lowering the
power
requirements even further.
Development
and
programming
support
for
the
PEEL22CV10AZ is provided by popular
third-party program-
mers and development
software. Anachip
also offers free Win-
PLACE development
software.
Figure 19 Block Diagram
I/CLK
1
I
2
I
3
I
4
I
5
I
6
I
7
I
8
I
9
I
10
I
11
GND
12
TSSOP
24
VCC
23
I/O
22
I/O
21
I/O
20
I/O
19
I/O
18
I/O
17
I/O
16
I/O
15
I/O
14
I/O
13
I
DIP
PLCC
SOIC
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PEEL22CV10AZJ-25 功能描述:SPLD - 簡單可編程邏輯器件 12 INP 10 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PEEL22CV10AZJ-25L 功能描述:SPLD - 簡單可編程邏輯器件 12 Input 10 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PEEL22CV10AZJI-25 功能描述:SPLD - 簡單可編程邏輯器件 12 INP 10 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PEEL22CV10AZJI-25L 功能描述:SPLD - 簡單可編程邏輯器件 12 Input 10 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PEEL22CV10AZP25 制造商:ICT 功能描述:
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