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參數(shù)資料
| 型號(hào)： | PEV20FV-FREQ |
| 廠商： | PLETRONICS INC |
| 元件分類： | XO, clock |
| 英文描述： | VCXO, CLOCK, 100 MHz - 650 MHz, PECL OUTPUT |
| 封裝： | LEADLESS PACKAGE-6 |
| 文件頁數(shù)： | 1/1頁 |
| 文件大小： | 40K |
| 代理商： | PEV20FV-FREQ |
PEV PECL VCXO Series
6 Pad Leadless Surface Mount PECL Voltage Controlled Xtal Oscillator
Differential PECL Output with Enable/Disable
Standard Specifications
Overall Frequency Stability
± 50, 25, 20 PPM over Operating Temperature Range
Operating Temperature Range
0 to +70°C is standard, but can be extended to- 40 to +85°C for certain frequencies
Control Voltage Range (CVR)
0.5 to 4.5 volts: 5.0 V Supply; 0.0 to 3.3 volts: 3.3 V Supply; 0.0 to 2.5 volts: 2.5 V Supply
Pullablity over CVR
± 50 PPM. Consult factory for > 50 PPM.
Linearity
± 20% (Consult factory for ± 10%)
Part Numbering Guide
Frequency Stability
Frequency in MHz
Frequency Deviation (Pullability) over CVR
3 PEV 20 B V - 100.0M - XXX (Internal Code or blank)
Consult factory for available frequencies and specs. Not all options available for all frequencies. A special part number may be assigned.
Frequency Stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration and load
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
5
Jan 2004
Pl tronics, Inc.
Mechanical:
not to scale
inches (mm)
V: ± 50 PPM
Operating Temperature Range
B: 0 to +70°C
F: - 40 to +85°C
20 = ±20PPM
25 = ±25PPM
50 = ± 50 PPM
Solder Pads
Packaging
Tube or
24mm tape
16mm pitch
Due to part size and factory abilities, part marking may vary from lot to lot and may contain our part number or an internal code.
Supply Voltage (Vcc)
3.3 volts ± 10% standard, but 5.0 volts or 2.5 volts also available
Output Waveform
PECL with Differential Output
Logic “1”
Vcc - 1.025 volts minimum
Logic “0”
Vcc - 1.620 volts maximum
Output Load
Output must be terminated into 50 ohms to (Vcc - 2.0 V). See Test Circuit 10 and Note 1.
Enable/Disable Option (E/D)
Symmetry
Tr & Tf
45/55% to 55/45% at 50% of Vcc level (see Waveform 2)
1.0 nS max (20 to 80%)
50 mA typical, 75 mA maximum
Supply Current (Icc)
6 pS RMS maximum, from 12 kHz to 20 MHz from carrier
Jitter
Note 1: In the typical PECL 100K logic output Voh is 2.35 volts and Vol is 1.60 volts at 3.3 Vcc. The center voltage of the PECL is therefore1.975 volts.
If a 50 resistor is placed between the output and Vcc – 2 volts (1.3 volts), the current through the resistor is (1.975 – 1.3) / 50 = 13.5 mA.
The same load can be simulated by a resistor of 147 ± 1% ohms to ground (1.975 / 0.0135 = 146.29 ohms). If additional load current is placed
on the output, its load current must be subtracted from the 13.5 mA to calculate a new load resistor. Using similar calculations, use 274 ± 1%
ohms to ground for 5.0V operation.
W
Output enabled when Pin #2 is open or at CMOS Logic “1”;
Output disabled when Pin #2 is at CMOS Logic “0”.
Model
Supply Voltage
Blank= 5.0 volts ±10%
3= 3.3 volts ±10%
2= 2.5 volts ±5%
Portions of the part number that appear after the frequency may not be marked on part (C of C provided)
100.00 MHz – 650.00 MHz
.400
(10.16)
MAX
.560 (14.23) MAX
Vcc
GND
Q
PLE
QN
Vcon
.195 (4.95)
MAX
E/D
Consult factory for optional 'J' leads
Consult factory for higher frequencies
.200 (5.08)
1
2
3
6
5
4
.23
(5.8)
.05
(1.3)
.12
(3.0)
3
2
4
5
6
1
Pl tronics, Inc.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA
Manufacturer of High Quality Frequency Control Products
.
PECL,
ECL,
LVDS
Page
1
-
7
For Best Performance,
Do NOT allow any traces other
than ground under oscillators
(Even in buried layers). See
Page 4A for layout guidelines.
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