
Intel Wireless Flash Memory
(W18)
128-Mbit W18 Family
Datasheet
Product Features
The Intel Wireless Flash Memory (W18) device with flexible multi-partition dual-operation
architecture, provides high-performance Asynchronous and Synchronous Burst reads. It is an
ideal memory for low-voltage burst CPUs. Combining high read performance with flash
memory intrinsic non-volatility, the W18 device eliminates the traditional system-performance
paradigm of shadowing redundant code memory from slow nonvolatile storage to faster
execution memory. It reduces total memory requirement that increases reliability and reduces
overall system power consumption and cost. The W18 device’s flexible multi-partition
architecture allows program or erase to occur in one partition while reading from another
partition. This allows for higher data write throughput compared to single-partition architectures
and designers can choose code and data partition sizes. The dual-operation architecture allows
two processors to interleave code operations while program and erase operations take place in
the background.
■
High Performance Read-While-Write/
Erase
— Burst frequency at 66 MHz
(zero wait states)
— 60 ns Initial access read speed
— 11 ns Burst mode read speed
— 20 ns Page mode read speed
— 4-, 8-, 16-, and Continuous-Word Burst
mode reads
— Burst and Page mode reads in all
Blocks, across all partition boundaries
— Burst Suspend feature
— Enhanced Factory Programming at
3.1 s/word (typ. for 130 nm)
■
Security
— 128-bit OTP Protection Register:
64 unique pre-programmed bits +
64 user-programmable bits
— Absolute Write Protection with VPP at
ground
— Individual and Instantaneous Block
Locking/Unlocking with Lock-Down
Capability
■
Quality and Reliability
— Temperature Range: –40 °C to +85 °C
— 100K Erase Cycles per Block
— 90 nm ETOX IX Process
— 130 nm ETOX VIII Process
— 180 nm ETOX VII Process
■
Architecture
— Multiple 4-Mbit partitions
— Dual Operation: RWW or RWE
— Parameter block size = 4 Kword
— Main block size = 32 Kword
— Top or bottom parameter devices
— 16-bit wide data bus
■
Software
— 5 s (typ.) Program and Erase Suspend
latency time
— Flash Data Integrator (FDI) and
Common Flash Interface (CFI)
Compatible
— Programmable WAIT signal polarity
■
Packaging and Power
— 90 nm: 64 Mb in VF BGA Package
— 130 nm: 32 Mb, 64 Mb, and 128 Mb in
VF BGA package; 128 Mb in QUAD+
package
— 180 nm: 32 Mb and 128 Mb densities in
VF BGA Package
— 56 Active Ball Matrix, 0.75 mm Ball-
Pitch
—VCC = 1.70 V to 1.95 V
—VCCQ = 1.70 V to 2.24 V or 1.35 V to
1.80 V (130 nm and 180 nm)
— Standby current (130 nm): 8 A (typ.)
— Read current: 8 mA (4-word burst, typ.)
290701-012
June 2004
Notice: This document contains information on new products in production. The specifications
are subject to change without notice. Verify with your local Intel sales office that you have the
latest datasheet before finalizing a design.