- 您現在的位置：買賣IC網 > PDF目錄367939 > PHD55N04LT Triple 1.8V to 6V High-Side MOSFET Drivers; Package: PDIP; No of Pins: 8; Temperature Range: 0°C to +70°C PDF資料下載
參數資料
| 型號： | PHD55N04LT |
| 英文描述： | Triple 1.8V to 6V High-Side MOSFET Drivers; Package: PDIP; No of Pins: 8; Temperature Range: 0°C to +70°C |
| 中文描述： | 晶體管| MOSFET的| N溝道| 35V的五（巴西）直| 55A條（丁）|對252AA |
| 文件頁數： | 1/11頁 |
| 文件大小： | 117K |
| 代理商： | PHD55N04LT |
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
Logic level FET
PHP55N04LT, PHB55N04LT
PHD55N04LT
FEATURES
SYMBOL
QUICK REFERENCE DATA
V
DSS
= 35 V
’Trench’
technology
Very low on-state resistance
Fast switching
Low thermal resistance
Logic level compatible
I
D
= 55 A
R
DS(ON)
≤
14 m
(V
GS
= 10 V)
R
DS(ON)
≤
18 m
(V
GS
= 5 V)
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’
trench
’ technology.
Applications:-
High frequency computer motherboard d.c. to d.c. converters
High current switching
The PHP55N04LT is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB55N04LT is supplied in the SOT404 (D
2
PAK) surface mounting package.
The PHD55N04LT is supplied in the SOT428 (DPAK)surface mounting package.
PINNING
SOT78 (TO220AB)
SOT404 (D
2
PAK)
SOT428 (DPAK)
PIN
DESCRIPTION
1
gate
2
drain
1
3
source
tab
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DSS
Drain-source voltage
V
DGR
Drain-gate voltage
V
GS
Gate-source voltage (DC)
V
GSM
Gate-source voltage (pulse
peak value)
I
D
Drain current (DC)
CONDITIONS
T
j
= 25 C to 175C
T
j
= 25 C to 175C; R
GS
= 20 k
MIN.
-
-
-
-
MAX.
35
35
±
15
±
20
UNIT
V
V
V
V
T
j
≤
150C
T
mb
= 25 C
T
mb
= 100 C
T
mb
= 25 C
-
-
-
55
38
220
A
A
A
I
DM
Drain current (pulse peak
value)
Total power dissipation
Operating junction and
storage temperature
P
tot
T
j
, T
stg
T
mb
= 25 C
-
103
175
W
C
- 55
d
g
s
1 2 3
tab
1
3
tab
2
1
2
3
tab
1
It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.
January 2001
1
Rev 1.000
相關PDF資料 |
PDF描述 |
|---|---|
| PHP55N04LT | TRANSISTOR | MOSFET | N-CHANNEL | 35V V(BR)DSS | 55A I(D) | TO-220AB |
| PHB55N04LT | RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS |
| PHB55N03 | TrenchMOS transistor Standard level FET |
| PHB55N03T | TrenchMOS transistor Standard level FET |
| PHD6N10E | PowerMOS transistor |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PHD5N20E | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PowerMOS transistor |
| PHD63NQ03LT | 制造商:NXP Semiconductors 功能描述:MOSFET N 30V D-PAK |
| PHD63NQ03LT,118 | 功能描述:MOSFET TAPE13 PWR-MOS RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續電流:130 A 電阻汲極/源極 RDS（導通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| PHD63NQ03LT | 制造商:NXP Semiconductors 功能描述:MOSFET N 30V D-PAK |
| PHD63NQ03LT/T3 | 功能描述:兩極晶體管 - BJT TAPE13 PWR-MOS RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發射極最大電壓 VCEO:- 40 V 發射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
發布緊急采購，3分鐘左右您將得到回復。