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參數資料
型號: PHP5N20E
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: PowerMOS transistor
中文描述: 5 A, 200 V, 0.9 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
封裝: PLASTIC, TO-220AB, 3 PIN
文件頁數: 1/7頁
文件大小: 51K
代理商: PHP5N20E
Philips Semiconductors
Product specification
PowerMOS transistor
PHP5N20E
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel
field-effect power transistor in a
plastic
envelope
avalanche energy capability, stable
blocking voltage, fast switching and
high thermal cycling performance
withlowthermalresistance.Intended
for use in Switched Mode Power
Supplies
(SMPS),
circuits
and
general
switching applications.
enhancement
mode
SYMBOL
PARAMETER
MAX.
UNIT
featuring
high
V
DS
I
D
P
tot
R
DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state resistance
200
5.0
60
0.9
V
A
W
motor
control
purpose
PINNING - TO220AB
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
tab
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
I
D
Continuous drain current
CONDITIONS
T
mb
= 25 C; V
GS
= 10 V
T
mb
= 100 C; V
GS
= 10 V
T
mb
= 25 C
T
mb
= 25 C
T
mb
> 25 C
MIN.
-
-
-
-
-
-
-
MAX.
5
3.5
20
60
0.4
±
30
40
UNIT
A
A
A
W
W/K
V
mJ
I
DM
P
D
P
D
/
T
mb
Linear derating factor
V
GS
Gate-source voltage
E
AS
Single pulse avalanche
energy
I
AS
Peak avalanche current
Pulsed drain current
Total dissipation
V
DD
50 V; starting T
j
= 25C; R
GS
= 50
;
V
GS
= 10 V
V
DD
50 V; starting T
j
= 25C; R
GS
= 50
;
V
GS
= 10 V
-
5
A
T
j
, T
stg
Operating junction and
storage temperature range
- 55
175
C
THERMAL RESISTANCES
SYMBOL
R
th j-mb
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
MIN.
-
TYP.
-
MAX.
2.5
UNIT
K/W
R
th j-a
-
60
-
K/W
1 2 3
tab
d
g
s
October 1997
1
Rev 1.100
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