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參數資料
型號: PI4ULS3V16AEX
廠商: Pericom
文件頁數: 1/7頁
文件大小: 0K
描述: IC VOLT TRANSLATOR 56-TSSOP
標準包裝: 1,500
系列: ULS
邏輯功能: 電平移位器,雙向,3 態
位數: 16
輸入類型: 電壓
輸出類型: 電壓
數據速率: 180Mbps
通道數: 16
輸出/通道數目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 3.5ns
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應商設備封裝: 56-TSSOP
包裝: 帶卷 (TR)
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1.2V to 3.6V Universal Bidirectional Level Shifter
with Automatic Direction Control
2013-07-0004
PT0483
07/12/13
1
PI4ULS3V16
Features
PI4ULS3V16 is designed for low voltage operation:
1.2V to 3.6V
Universal
bidirectional
level
shifting
with
automatic direction control
Fast bus speeds up to 180 Mbps for push-pull
application
Drive Capability 12mA
Independent translation of each bit
Each supply rail is configurable over supply range
ESD Protection exceeds JESD22
- 2000V Human Body Model (A114-B)
-200V Machine Model (A115-A)
Latch-up performance exceeds 100mA per JESD
78
Industrial operation at -40°C to +85°C
Package: 56-contact plastic 197-mil TQFN
Pin Configuration
TQFN-56L(Top View)
Description
PI4ULS3V16, is a 16-bit (dual-octal) non-inverting
bus transceiver with two separate supply rails: A port
(VCCA) and B port (VCCB) are set to operate at 1.2V to
3.6V. This arrangement permits universal bidirectional
translation of differential signal levels over the voltage
ranges.
The PI4ULS3V16 is designed for asynchronous
communication between data buses. Data is transmitted
from the A bus to the B bus, or vice versa, without
direction control. All AX, and BX are tri-stated when
data is coming from both directions at the same time.
The output-enable (OE) input is used to disable outputs
so buses are isolated.
The control pins xSEL, xOE, TEST_EN and
OUT_SEL are supplied by VCCB.
To ensure the high impedance state during power-
up or power- down, the output-enable (OE) input should
be tied to VCC through a pull-up resistor: the minimum
value of the resistor is determined by the current-sinking
capability of the driver.
Applications
Voltage Translation
Bus Relay
Pin Description
Pin Name
Description
xOE
3-State Output Enable Inputs (Active Low)
xSEL
Outputs Loading Selection
xAx
Side A Inputs/Outputs
xBx
Side B Inputs/Outputs
TEST_EN
Enable Test Mode
OUT_SEL
Output impedance select
GND
Ground
VccA,VCCB
Power
TSTx
Internal test pins. For normal usage, please
tie to ground
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