參數資料
| 型號： | PI4ULS5V104GAEX |
| 廠商： | Pericom |
| 文件頁數： | 1/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LOGIC TRANSLATOR |
| 標準包裝： | 1 |
| 系列： | ULS |
| 邏輯功能： | 電平移位器，雙向，3 態 |
| 位數： | 4 |
| 輸入類型： | 電壓 |
| 輸出類型： | 電壓 |
| 數據速率： | 100Mbps |
| 通道數： | 4 |
| 輸出/通道數目： | 1 |
| 差分 - 輸入:輸出： | 無/無 |
| 傳輸延遲（最大）： | 4ns |
| 電源電壓： | 1.2 V ~ 3.6 V，1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 12-UFBGA，CSPBGA |
| 供應商設備封裝： | 12-CSP（1.87x1.37） |
| 包裝： | 標準包裝 |
| 其它名稱： | PI4ULS5V104GAEXDKR |
PI4ULS5V104
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4-Bit Bi-directional Level Shifter with
Automatic Direction Controller
12-07-0010
PT0335-4
08/24/12
1
Features
1.2V to 3.6V on A Port and 1.65V to 5.5V on B Port
(VCCA ≤ VCCB)
V
CC Isolation Feature – If Either VCC Input Is at
GND, All Outputs Are in the High-Impedance State
OE Input Circuit Referenced to V
CCA
Low Power Consumption, 5-μA Max I
CC
I
off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100mA Per JESD
78, Class II
ESD Protection Exceeds JESD 22
A Port
2500-V Human-Body Model (A114-F)
200-V Machine Model (A115-A)
1500-V Charged-Device Model (C101D)
B Port
15-kV Human-Body Model (A114-F)
200-V Machine Model (A115-A)
1500-V Charged-Device Model (C101D)
Description
This 4-bit non-inverting translator uses two separate
configurable power-supply rails. The A port is designed
to track VCCA. VCCA accepts any supply voltage from
1.2V to 3.6V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.65V to 5.5V. This
allows for universal low-voltage bidirectional translation
between any of the 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, and
5V voltage nodes. VCCA should not exceed VCCB.
When the output-enable (OE) input is low, all outputs
are placed in the high-impedance state.
The PI4ULS5V104 is designed so that the OE input
circuit is supplied by VCCA.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through
the device when it is powered down.
To ensure the high-impedance state during power up or
power down, OE should be tied to GND through a pull-
down resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
Pin Configuration
1
2
3
A
B
C
D
CSP-12 (Bottom View)
B1
B2
B3
B4
VCCB
VCCA
OE
GND
A1
A2
A3
A4
A
B
C
D
1
2
3
1
2
3
4
5
6
7
8
14
13
12
11
10
9
V
C
A
V
C
B
B1
B2
B3
B4
NC
A1
A2
A3
A4
NC
G
N
D
O
E
RGY PACKAGE
(TOP VIEW)
NC - No internal connection
QFN3.5x3.5-14L
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