參數資料
| 型號： | PI6C3Q993-5QE |
| 廠商： | Pericom |
| 文件頁數： | 1/10頁 |
| 文件大小： | 0K |
| 描述： | IC PROG PLL CLOCK DRIVER 28-QSOP |
| 產品變化通告： | Product Discontinuation Notice 11/Feb/2008 |
| 標準包裝： | 48 |
| 系列： | SuperClock® |
| 類型： | PLL 時鐘驅動器 |
| PLL： | 帶旁路 |
| 輸入： | CMOS |
| 輸出： | CMOS，LVTTL |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:8 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 85MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 28-QSOP |
| 包裝： | 管件 |
1
PS8449H
10/27/09
Features
PI6C3Q99x family provides following products:
PI6C3Q991:32-pinPLCCversion
PI6C3Q993:28-pinQSOPversion
Inputs are 5V Tolerant
4 pairs of programmable skew outputs
Low skew: 200ps same pair; 250ps all outputs
Selectable positive or negative edge synchronization:
Excellent for DSP applications
Synchronous output enable
Input frequency: 3.75 MHz to 85 MHz
Output frequency: 15 MHz to 85MHz
2x, 4x, 1/2, and 1/4 outputs
3 skew grades:
PI6C3Q99x:tSKEW0<750ps
PI6C3Q99x-5:tSKEW0<500ps
PI6C3Q99x-2:tSKEW0<250ps
3-level inputs for skew and PLL range control
PLL bypass for DC testing
External feedback, internal loop filter
12mA balanced drive outputs
Low Jitter: < 200ps peak-to-peak
Industrial temperature range
Packaging (Pb-free and Green available):
—32-pinPLCC
—28-pinQSOP
Description
ThePI6C3Q99xfamilyisa3.3VPLL-basedclockdriver intendedfor
high-performance computing and data-communication applica-
tions. A key feature of the programmable skew is the ability of
outputs to lead or lag the REF input signal. The PI6C3Q991 has 8
programmable skew outputs in 4 banks of 2, while the PI6C3Q993
has 6 programmable skew outputs and 2 zero skew outputs. Skew
is controlled by 3-level input signals that may be hard-wired to
appropriate HIGH-MID-LOW levels.
When the GND/sOE pin is held LOW, all outputs are synchronously
enabled.However,ifGND/sOEisheldHIGH,alloutputsexcept3Q0
and 3Q1 are synchronously disabled. Furthermore, when the V CCQ
/PE is held HIGH, all outputs are synchronized with the positive
edge of the REF clock input. When VCCQ /PE is held LOW, all
outputs are synchronized with the negative edge of REF. Both
devices have LVTTL 12mA balanced drive outputs.
PinConfigurations
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI6C3Q991, PI6C3Q993
3.3V Programmable Skew PLL Clock Driver
SuperClock
REF
VCCQ
FS
3F0
3F1
VCCQ/PE
VCCN
4Q1
4Q0
GND
3Q1
3Q0
VCCN
FB
GND
TEST
2F1
2F0
GND/sOE
1F1
1F0
VCCN
1Q0
1Q1
GND
2Q0
2Q1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
2F0
GND/sOE
1F1
1F0
VCCN
1Q0
1Q1
GND
3F1
4F0
4F1
VCCQ/PE
VCCN
4Q1
4Q0
GND
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
3Q1
3Q0
V
CCN
FB
V
CCN
2Q1
2Q0
3F0
FS
V
CCQ
REF
GND
TEST
2F1
4
3
2
1
32 31 30
14
15 16
17 18 19 20
PI6C3Q993
PI6C3Q991
09-0003
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PI6C3Q993-5QEX | 功能描述:鎖相環 - PLL Programmable Skew Zero Delay RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C3Q993A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clock IC | 750ps Accuracy. 3.3V. Balanced. 3.75 to 85 MHz |
| PI6C3Q993A-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clock IC | 250ps Accuracy. 3.3V. Balanced. 3.75 to 85 MHz |
| PI6C3Q993A-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clock IC | 500ps Accuracy. 3.3V. Balanced. 3.75 to 85 MHz |
| PI6C3Q993A-5I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clock IC | 500ps Accuracy. 3.3V. Balanced. 3.75 to 85 MHz. Industrial Temp. Operation |
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