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參數資料
| 型號： | PI74ALVCH162260 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 12-Bit To 24-Bit Multiplexed D-Type Latch with 3-STATE Outputs |
| 中文描述： | 12位到24位復用D類鎖存器與三態輸出 |
| 文件頁數： | 1/5頁 |
| 文件大小： | 253K |
| 代理商： | PI74ALVCH162260 |
PI74ALVCH162260
12-Bit To 24-Bit Multiplexed D-Type Latch with 3-State Outputs
1
PS8127 03/17/98
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PI74ALVCH162260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-STATE Outputs
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH162260 is a 12-bit to 24-bit multiplexed D-type
latch designed for 2.3V to 3.6 V
CC
operation. It is used in
applications where two separate datapaths must be multiplexed
onto, or demultiplexed from, a single data path.
Typical applications include multiplexing and/or demulti-
plexing address and data information in microprocessor or
bus-interface applications. This device is also useful in
memory-interleaving applications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are
available for address and/or data transfer. The output-enable
(OE1B, OE2B, and OEA) inputs control the bus transceiver
functions. The OE1B and OE2B control signals also allow bank
control in the A-to-B direction.
Address and/or data information can be stored using the
internal storage latches. The latch-enable (LE1B, LE2B, LEA1B,
and LEA2B) inputs are used to control data storage. When the
latch-enable input is HIGH, the latch is transparent. When the
latch-enable input goes LOW, the data present at the inputs
is latched and remains latched until the latch-enable input is
returned HIGH.
To reduce overshoot and undershoot, the B-port outputs
include 26
series resistors.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vcc through a pullup resistor, the
minimum value of the resistor is determined by the current-
sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or
floating data inputs at a valid logic level.
Logic Block Diagram
G1
OE2B
C1
1D
1
B
1
TO 11 OTHER CHANNELS
OE1B
OEA
A1
LE1B
LE2B
LEA1B
LEA2B
SEL
1
1
C1
1D
C1
1D
C1
1D
2
B
1
23
6
28
8
1
29
56
55
30
27
2
Product Features
PI74ALVCH162260 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at 40°C to +85°C
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
相關PDF資料 |
PDF描述 |
|---|---|
| PI74ALVCH16373 | 16-Bit Transparent D-Type Latch with 3-STATE Outputs |
| PI74ALVCH16373A | 8-Bit D-Type Latch |
| PI74ALVCH16373V | 8-Bit D-Type Latch |
| PI74ALVCH16827 | 20-Bit Buffer/Driver with 3-STATE Outputs |
| PI74ALVCHR162245 | 3.3V 16-Bit Bidirectional Transceiver with 3-State Output |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PI74ALVCH1622601 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:18-Bit Universal Bus Transceiver With 3-State Outputs |
| PI74ALVCH1622601A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit Bus Transceiver |
| PI74ALVCH1622601SA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit Bus Transceiver |
| PI74ALVCH1622601SV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit Bus Transceiver |
| PI74ALVCH1622601V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit Bus Transceiver |
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