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參數資料
| 型號： | PLL500-17 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Low Phase Noise VCXO (17MHz to 36MHz) |
| 中文描述： | 低相位噪聲壓控振蕩器（17MHz至36MHz基本） |
| 文件頁數： | 1/6頁 |
| 文件大小： | 215K |
| 代理商： | PLL500-17 |
PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 03/29/05 Page 1
FEATURES
VCXO output for the 17MHz to 36MHz range
Low phase noise (-130 dBc @ 10kHz offset at
35.328MHz).
CMOS output with OE tri-state control.
17 to 36MHz fundamental crystal input.
Integrated high linearity variable capacitors.
12mA drive capability at TTL output.
+/- 150 ppm pull range, max 5% linearity.
Low jitter (RMS): 2.5ps period jitter.
2.5 to 3.3V operation.
Available in 8-Pin SOIC, 6-pin SOT23 packages,
or DIE.
DESCRIPTION
The PLL500-17 is a low cost, high performance and
low phase noise VCXO for the 17 to 36MHz range,
providing less than -130dBc at 10kHz offset at
35.328MHz. The very low jitter (2.5 ps RMS period
jitter) makes this chip ideal for applications requiring
voltage controlled frequency sources. Input crystal
can range from 17 to 36MHz (fundamental resonant
mode).
FREQUENCY RANGE
MULTIPLIER
FREQUENCY
OUTPUT
BUFFER
CMOS
No PLL
17 – 36 MHz
BLOCK DIAGRAM
PIN CONFIGURATION
8-pin SOIC
6-pin SOT
XTAL
OSC
OE
XIN
XOUT
VCON
VARICAP
P
1
2
3
4
5
6
7
8
XIN
VDD*
VIN
GND
XOUT
VDD*
CLK
OE^
^: Denotes internal Pull-up
*: Only one VDD pin needs to be connected
P
1
2
3
5
6
OUT
GND
CLK
XIN
VDD
VIN
4
相關PDF資料 |
PDF描述 |
|---|---|
| PLL500-17DC | Low Phase Noise VCXO (17MHz to 36MHz) |
| PLL500-17SC | Low Phase Noise VCXO (17MHz to 36MHz) |
| PLL500-17SCL | Low Phase Noise VCXO (17MHz to 36MHz) |
| PLL500-17SCL-R | Low Phase Noise VCXO (17MHz to 36MHz) |
| PLL500-17SC-R | Low Phase Noise VCXO (17MHz to 36MHz) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PLL500-17B | 制造商:PLL 制造商全稱:PLL 功能描述:Low Phase Noise VCXO (17MHz to 36MHz) |
| PLL500-17BDC | 制造商:PLL 制造商全稱:PLL 功能描述:Low Phase Noise VCXO (17MHz to 36MHz) |
| PLL500-17BSC | 制造商:PLL 制造商全稱:PLL 功能描述:Low Phase Noise VCXO (17MHz to 36MHz) |
| PLL500-17BSCL | 制造商:PLL 制造商全稱:PLL 功能描述:Low Power CMOS Output VCXO Family (17MHz to 130MHz) |
| PLL500-17BSCLR | 制造商:PLL 制造商全稱:PLL 功能描述:Low Power CMOS Output VCXO Family (17MHz to 130MHz) |
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